Searched refs:clk (Results 26 - 50 of 956) sorted by relevance

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/u-boot/drivers/clk/
H A Dclk-composite.c10 #include <clk.h>
11 #include <clk-uclass.h>
17 #include <linux/clk-provider.h>
20 #include "clk.h"
24 static u8 clk_composite_get_parent(struct clk *clk) argument
26 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
27 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
36 clk_composite_set_parent(struct clk *clk, struct clk *parent) argument
49 clk_composite_recalc_rate(struct clk *clk) argument
62 clk_composite_set_rate(struct clk *clk, unsigned long rate) argument
75 clk_composite_enable(struct clk *clk) argument
88 clk_composite_disable(struct clk *clk) argument
111 struct clk *clk; local
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H A Dclk-uclass.c12 #include <clk.h>
13 #include <clk-uclass.h>
25 #include <linux/clk-provider.h>
33 struct clk *dev_get_clk_ptr(struct udevice *dev)
35 return (struct clk *)dev_get_uclass_priv(dev);
40 struct clk *clk)
44 ret = device_get_by_ofplat_idx(cells->idx, &clk->dev);
47 clk->id = cells->arg[0];
54 static int clk_of_xlate_default(struct clk *cl argument
39 clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells, struct clk *clk) argument
74 clk_get_by_index_tail(int ret, ofnode node, struct ofnode_phandle_args *args, const char *list_name, int index, struct clk *clk) argument
115 clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name, int index, struct clk *clk) argument
139 clk_get_by_index(struct udevice *dev, int index, struct clk *clk) argument
144 clk_get_by_index_nodev(ofnode node, int index, struct clk *clk) argument
189 clk_set_default_get_by_id(struct clk *clk) argument
209 struct clk clk, parent_clk, *c, *p; local
292 struct clk clk, *c; local
400 clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk) argument
406 clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk) argument
425 clk_release_all(struct clk *clk, unsigned int count) argument
445 clk_request(struct udevice *dev, struct clk *clk) argument
462 clk_get_rate(struct clk *clk) argument
477 clk_get_parent(struct clk *clk) argument
496 clk_get_parent_rate(struct clk *clk) argument
520 clk_round_rate(struct clk *clk, ulong rate) argument
535 clk_get_priv(struct clk *clk, struct clk **clkp) argument
548 clk_clean_rate_cache(struct clk *clk) argument
564 clk_set_rate(struct clk *clk, ulong rate) argument
585 clk_set_parent(struct clk *clk, struct clk *parent) argument
608 clk_enable(struct clk *clk) argument
669 clk_disable(struct clk *clk) argument
745 struct clk *clk = dev_get_clk_ptr(dev); local
776 struct clk *clk; local
802 UCLASS_DRIVER(clk) = { variable
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H A Dclk_sandbox_ccf.c11 #include <clk.h>
13 #include <asm/clk.h>
14 #include <clk-uclass.h>
17 #include <linux/clk-provider.h>
18 #include <sandbox-clk.h>
22 * Sandbox implementation of CCF primitives necessary for clk-uclass testing
27 struct clk clk; member in struct:clk_pllv3
32 int sandbox_clk_enable_count(struct clk *clk) argument
44 clk_pllv3_get_rate(struct clk *clk) argument
60 struct clk *clk; local
89 struct clk clk; member in struct:clk_gate2
95 clk_gate2_enable(struct clk *clk) argument
103 clk_gate2_disable(struct clk *clk) argument
124 struct clk *clk; local
150 sandbox_clk_composite_divider_recalc_rate(struct clk *clk) argument
174 struct clk *clk = ERR_PTR(-ENOMEM); local
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H A Dclk-gate.c13 #include <clk.h>
15 #include <clk-uclass.h>
22 #include <linux/clk-provider.h>
26 #include "clk.h"
53 static void clk_gate_endisable(struct clk *clk, int enable) argument
55 struct clk_gate *gate = to_clk_gate(clk);
81 static int clk_gate_enable(struct clk *clk) argument
83 clk_gate_endisable(clk,
88 clk_gate_disable(struct clk *clk) argument
95 clk_gate_is_enabled(struct clk *clk) argument
127 struct clk *clk; local
[all...]
H A Dclk_sandbox.c7 #include <clk-uclass.h>
11 #include <asm/clk.h>
12 #include <linux/clk-provider.h>
14 static ulong sandbox_clk_get_rate(struct clk *clk) argument
16 struct sandbox_clk_priv *priv = dev_get_priv(clk->dev);
21 if (clk->id >= SANDBOX_CLK_ID_COUNT)
24 return priv->rate[clk->id];
27 static ulong sandbox_clk_round_rate(struct clk *clk, ulon argument
43 sandbox_clk_set_rate(struct clk *clk, ulong rate) argument
63 sandbox_clk_enable(struct clk *clk) argument
78 sandbox_clk_disable(struct clk *clk) argument
93 sandbox_clk_request(struct clk *clk) argument
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/u-boot/drivers/clk/at91/
H A Dclk-system.c9 * Based on drivers/clk/at91/clk-system.c from Linux.
13 #include <clk-uclass.h>
16 #include <linux/clk-provider.h>
17 #include <linux/clk/at91_pmc.h>
21 #define UBOOT_DM_CLK_AT91_SYSTEM "at91-system-clk"
27 struct clk clk; member in struct:clk_system
31 #define to_clk_system(_c) container_of(_c, struct clk_system, clk)
47 static int clk_system_enable(struct clk *cl argument
64 clk_system_disable(struct clk *clk) argument
83 struct clk *clk; local
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H A Dclk-utmi.c9 * Based on drivers/clk/at91/clk-utmi.c from Linux.
13 #include <clk-uclass.h>
15 #include <linux/clk-provider.h>
16 #include <linux/clk/at91_pmc.h>
23 #define UBOOT_DM_CLK_AT91_UTMI "at91-utmi-clk"
24 #define UBOOT_DM_CLK_AT91_SAMA7G5_UTMI "at91-sama7g5-utmi-clk"
35 struct clk clk; member in struct:clk_utmi
38 #define to_clk_utmi(_clk) container_of(_clk, struct clk_utmi, clk)
49 clk_utmi_enable(struct clk *clk) argument
102 clk_utmi_disable(struct clk *clk) argument
111 clk_utmi_get_rate(struct clk *clk) argument
128 struct clk *clk; local
168 clk_utmi_sama7g5_enable(struct clk *clk) argument
206 struct clk *clk; local
[all...]
H A Dclk-main.c9 * Based on drivers/clk/at91/clk-main.c from Linux.
14 #include <clk-uclass.h>
16 #include <linux/clk-provider.h>
17 #include <linux/clk/at91_pmc.h>
23 #define UBOOT_DM_CLK_AT91_MAIN_RC "at91-main-rc-clk"
24 #define UBOOT_DM_CLK_AT91_MAIN_OSC "at91-main-osc-clk"
25 #define UBOOT_DM_CLK_AT91_RM9200_MAIN "at91-rm9200-main-clk"
26 #define UBOOT_DM_CLK_AT91_SAM9X5_MAIN "at91-sam9x5-main-clk"
37 struct clk cl member in struct:clk_main_rc
44 struct clk clk; member in struct:clk_main_osc
55 struct clk clk; member in struct:clk_main
60 main_rc_enable(struct clk *clk) argument
84 main_rc_disable(struct clk *clk) argument
111 struct clk *clk; local
141 clk_main_osc_enable(struct clk *clk) argument
168 clk_main_osc_disable(struct clk *clk) argument
197 struct clk *clk; local
248 clk_rm9200_main_enable(struct clk *clk) argument
263 struct clk *clk; local
302 clk_sam9x5_main_enable(struct clk *clk) argument
315 clk_sam9x5_main_set_parent(struct clk *clk, struct clk *parent) argument
352 struct clk *clk = ERR_PTR(-ENOMEM); local
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/u-boot/drivers/clk/tegra/
H A DMakefile6 obj-$(CONFIG_TEGRA_CAR_CLOCK) += tegra-car-clk.o
7 obj-$(CONFIG_TEGRA186_CLOCK) += tegra186-clk.o
/u-boot/drivers/clk/starfive/
H A DMakefile3 obj-y += clk-jh7110.o
4 obj-y += clk-jh7110-pll.o
/u-boot/test/dm/
H A Dclk_ccf.c8 #include <clk.h>
10 #include <asm/clk.h>
16 #include <sandbox-clk.h>
21 struct clk *clk, *pclk; local
26 struct clk clk_ccf;
31 /* Get the device using the clk device */
32 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-ccf", &dev));
33 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &test_dev));
36 ret = clk_get_by_id(SANDBOX_CLK_ECSPI_ROOT, &clk);
[all...]
/u-boot/arch/arm/mach-uniphier/clk/
H A DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-ld4.o clk-dram-ld4.o dpll-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-ld4.o clk-dram-ld4.o dpll-pro4.o
7 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-ld4.o clk-dram-ld4.o dpll-sld8.o
8 obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-ld4.o clk-dram-pro5.o dpll-pro5.o
9 obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-ld4.o clk
[all...]
/u-boot/drivers/clk/imx/
H A Dclk-composite-93.c11 #include <clk-uclass.h>
15 #include <linux/clk-provider.h>
16 #include <clk.h>
17 #include "clk.h"
38 static int imx93_clk_composite_wait_ready(struct clk *clk, void __iomem *reg) argument
51 static void imx93_clk_composite_gate_endisable(struct clk *clk, int enable) argument
53 struct clk_gate *gate = to_clk_gate(clk);
65 imx93_clk_composite_wait_ready(clk, gat
68 imx93_clk_composite_gate_enable(struct clk *clk) argument
75 imx93_clk_composite_gate_disable(struct clk *clk) argument
92 struct clk *clk = ERR_PTR(-ENOMEM); local
[all...]
H A Dclk-imx8.c8 #include <clk-uclass.h>
18 #include "clk-imx8.h"
20 __weak ulong imx8_clk_get_rate(struct clk *clk) argument
25 __weak ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) argument
30 __weak int __imx8_clk_enable(struct clk *clk, bool enable) argument
35 static int imx8_clk_disable(struct clk *clk) argument
40 imx8_clk_enable(struct clk *clk) argument
48 struct clk clk; local
[all...]
H A Dclk-gate2.c20 #include <clk-uclass.h>
24 #include <linux/clk-provider.h>
25 #include <clk.h>
26 #include "clk.h"
32 struct clk clk; member in struct:clk_gate2
40 #define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
42 static int clk_gate2_enable(struct clk *clk) argument
44 struct clk_gate2 *gate = to_clk_gate2(clk);
58 clk_gate2_disable(struct clk *clk) argument
77 clk_gate2_set_rate(struct clk *clk, ulong rate) argument
100 struct clk *clk; local
[all...]
/u-boot/drivers/clk/meson/
H A Daxg-ao.c6 #include <clk-uclass.h>
26 static int meson_set_gate(struct clk *clk, bool on) argument
28 struct meson_clk *priv = dev_get_priv(clk->dev);
31 gate = &gates[clk->id];
39 static int meson_clk_enable(struct clk *clk) argument
41 return meson_set_gate(clk, true);
44 static int meson_clk_disable(struct clk *clk) argument
60 meson_clk_request(struct clk *clk) argument
[all...]
H A Dg12a-ao.c6 #include <clk-uclass.h>
26 static int meson_set_gate(struct clk *clk, bool on) argument
28 struct meson_clk *priv = dev_get_priv(clk->dev);
31 gate = &gates[clk->id];
39 static int meson_clk_enable(struct clk *clk) argument
41 return meson_set_gate(clk, true);
44 static int meson_clk_disable(struct clk *clk) argument
60 meson_clk_request(struct clk *clk) argument
[all...]
/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos5.c11 #include <asm/arch/clk.h>
549 struct exynos5_clock *clk = local
558 clrbits_le32(&clk->src_cpu, MUX_APLL_SEL_MASK);
560 val = readl(&clk->mux_stat_cpu);
563 clrbits_le32(&clk->src_core1, MUX_MPLL_SEL_MASK);
565 val = readl(&clk->mux_stat_core1);
568 clrbits_le32(&clk->src_top2, MUX_CPLL_SEL_MASK);
569 clrbits_le32(&clk->src_top2, MUX_EPLL_SEL_MASK);
570 clrbits_le32(&clk->src_top2, MUX_VPLL_SEL_MASK);
571 clrbits_le32(&clk
784 struct exynos5420_clock *clk = local
979 struct exynos5_clock *clk = local
995 struct exynos5_clock *clk = local
[all...]
/u-boot/include/linux/
H A Dclk-provider.h14 #include <clk-uclass.h>
18 static inline void clk_dm(ulong id, struct clk *clk) argument
20 if (!IS_ERR(clk))
21 clk->id = id;
25 * flags used across common struct clk. these flags should only affect the
29 * Please update clk_flags[] in drivers/clk/clk.c when making changes here!
36 #define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */
37 #define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rat
55 struct clk clk; member in struct:clk_mux
92 struct clk clk; member in struct:clk_gate
118 struct clk clk; member in struct:clk_divider
190 struct clk clk; member in struct:clk_fixed_factor
201 struct clk clk; member in struct:clk_fixed_rate
211 struct clk clk; member in struct:clk_composite
[all...]
/u-boot/drivers/clk/ti/
H A Dclk-sci.c8 * Loosely based on Linux kernel sci-clk.c...
14 #include <clk-uclass.h>
47 static int ti_sci_clk_of_xlate(struct clk *clk, argument
50 debug("%s(clk=%p, args_count=%d)\n", __func__, clk, args->args_count);
61 clk->id = args->args[0];
62 clk->data = args->args[1];
67 static ulong ti_sci_clk_get_rate(struct clk *clk) argument
88 ti_sci_clk_set_rate(struct clk *clk, ulong rate) argument
113 ti_sci_clk_set_parent(struct clk *clk, struct clk *parent) argument
157 ti_sci_clk_enable(struct clk *clk) argument
177 ti_sci_clk_disable(struct clk *clk) argument
[all...]
/u-boot/board/microchip/pic32mzda/
H A Dpic32mzda.c12 #include <clk.h>
23 struct clk clk; local
31 clk.id = PB7CLK;
32 ret = clk_request(dev, &clk);
36 rate = clk_get_rate(&clk);
/u-boot/arch/arm/mach-versal-net/
H A DMakefile9 obj-y += clk.o
/u-boot/arch/arm/mach-k3/r5/am62px/
H A DMakefile5 obj-y += clk-data.o
/u-boot/arch/arm/mach-k3/r5/am62x/
H A DMakefile5 obj-y += clk-data.o
/u-boot/arch/arm/mach-k3/r5/j7200/
H A DMakefile4 obj-y += clk-data.o

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