Searched refs:CLK_APMIXED_APLL2 (Results 51 - 60 of 60) sorted by relevance
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 238 #define CLK_APMIXED_APLL2 7 macro
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| H A D | mt2712-clk.h | 17 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt6779-clk.h | 178 #define CLK_APMIXED_APLL2 13 macro
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| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
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| H A D | mt8186-clk.h | 277 #define CLK_APMIXED_APLL2 13 macro
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| H A D | mt8192-clk.h | 310 #define CLK_APMIXED_APLL2 9 macro
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| H A D | mediatek,mt8188-clk.h | 310 #define CLK_APMIXED_APLL2 10 macro
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| H A D | mt8195-clk.h | 376 #define CLK_APMIXED_APLL2 17 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 47 PLL(CLK_APMIXED_APLL2, 0x01A0, 0x01B0, 0x00000001, 0,
102 FACTOR0(CLK_TOP_APLL2, CLK_APMIXED_APLL2, 1, 1),
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| H A D | clk-mt8518.c | 47 PLL(CLK_APMIXED_APLL2, 0x01A0, 0x01B0, 0x00000001,
101 FACTOR0(CLK_TOP_APLL2, CLK_APMIXED_APLL2, 1, 1),
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