/openbsd-current/sys/dev/ic/ |
H A D | ncr53c9xreg.h | 65 #define NCRCMD_TRANS 0x10 /* Transfer Information */ 76 #define NCRSTAT_TC 0x10 /* Terminal Count */ 81 #define NCR_BUSID_HME 0x10 /* XXX HME reselect ID */ 88 #define NCRINTR_BS 0x10 /* Bus Service */ 115 #define NCRCFG1_PARENB 0x10 /* Enable Parity Check */ 134 #define NCRCFG2_DREQ 0x10 /* DREQ High Impedance */ 139 #define NCRCFG2_HMEFE 0x10 /* HME feature enable */ 145 #define NCRCFG3_IDM 0x10 /* ID Message Res Check */ 163 #define NCRESPCFG3_FSCSI 0x10 /* Fast SCSI */ 174 #define NCRF9XCFG3_FSCSI 0x10 /* Fas [all...] |
H A D | osiopreg.h | 77 #define OSIOP_DSA 0x10 /* rw: Data Structure Address */ 130 #define OSIOP_SCNTL0_WATN 0x10 /* (Select) With ATN */ 141 #define OSIOP_SCNTL1_CON 0x10 /* Connected */ 153 #define OSIOP_SIEN_SEL 0x10 /* (Re)Selected */ 182 #define OSIOP_SEL 0x10 212 #define OSIOP_DSTAT_ABRT 0x10 /* Aborted */ 223 #define OSIOP_SSTAT0_SEL 0x10 /* (Re)Selected */ 234 #define OSIOP_SSTAT1_AIP 0x10 /* Arbitration in progress */ 254 #define OSIOP_CTEST0_EAN 0x10 /* Enable Active Negation */ 273 #define OSIOP_CTEST2_SFP 0x10 /* SCS [all...] |
H A D | rtl80x9reg.h | 79 #define RTL3_CONFIG1_IRQS0 0x10 117 #define RTL3_CONFIG2_8029PF 0x10 /* Pause Flag */ 125 #define RTL3_CONFIG2_8019BS4 0x10 /* BROM size/base */ 137 #define RTL3_CONFIG3_LEDS0 0x10 /* LED0 pin configuration */
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H A D | z8530reg.h | 127 #define ZSM_RESET_STINT 0x10 /* reset external/status interrupt */ 158 #define ZSWR1_RIE 0x10 /* rxint per char & on S.C. */ 186 #define ZSWR3_HUNT 0x10 /* enter hunt mode */ 204 #define ZSWR4_BISYNC 0x10 /* 16 bit sync char (sync only) */ 232 #define ZSWR5_BREAK 0x10 /* send break (continuous 0s) */ 254 #define ZSWR7P_DTR_TIME 0x10 /* modifies deact. speed of /DTR//REQ */ 270 #define ZSWR9_STATUS_HIGH 0x10 /* status in high bits of intr vec */ 288 #define ZSWR10_GA_ON_POLL 0x10 /* go active on poll (loop mode) */ 308 #define ZSWR11_TXCLK_BAUD 0x10 /* xmit clock taken from BRG */ 357 #define ZSWR14_LOCAL_LOOPBACK 0x10 /* se [all...] |
H A D | ax88190reg.h | 42 #define AX88190_MEMR_EECS 0x10 /* EEPROM Chip Select */
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H A D | lemacreg.h | 56 #define LEMAC_REG_DAT 0x10 /* Data */ 97 #define LEMAC_EEP_SW_SQE 0x10 /* Enable TX_SQE on Transmits */ 109 #define LEMAC_RX_IAM 0x10 /* Individual Address Match */ 115 #define LEMAC_TS_ECL 0x10 /* Excessive collision of ... */ 126 #define LEMAC_TX_QMD 0x10 /* Q-Mode (yes) */ 143 #define LEMAC_TDQ_NCL 0x10 /* No carrier loopback */ 152 #define LEMAC_CS_MBZ4 0x10 /* MBZ */
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H A D | oosiopreg.h | 60 #define OOSIOP_SCRA0 0x10 /* rw: Scratch A */ 108 #define OOSIOP_SCNTL0_WATN 0x10 /* (Select) With ATN */ 119 #define OOSIOP_SCNTL1_CON 0x10 /* Connected */ 130 #define OOSIOP_SIEN_SEL 0x10 /* (Re)Selected */ 159 #define OOSIOP_SEL 0x10 181 #define OOSIOP_DSTAT_ABRT 0x10 /* Aborted */ 192 #define OOSIOP_SSTAT0_SEL 0x10 /* (Re)Selected */ 203 #define OOSIOP_SSTAT1_AIP 0x10 /* Arbitration in progress */ 233 #define OOSIOP_CTEST2_SFP 0x10 /* SCSI FIFO Parity */ 245 #define OOSIOP_CTEST4_SLBE 0x10 /* SCS [all...] |
/openbsd-current/gnu/usr.bin/gcc/gcc/testsuite/gcc.c-torture/execute/ |
H A D | 20030715-1.c | 17 const char *err = ap_check_cmd_context (a, 0x01|0x02|0x04|0x08|0x10);
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H A D | 980612-1.c | 14 if (((f->a & 0x7f) & ~0x10) <= 2)
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/openbsd-current/sys/arch/sparc64/dev/ |
H A D | sab82532reg.h | 91 #define SAB_STAR_FCS 0x10 /* flow control status */ 100 #define SAB_CMDR_STI 0x10 /* start timer */ 107 #define SAB_MODE_FLON 0x10 /* flow control on */ 120 #define SAB_DAFO_PAR1 0x10 /* parity 1, see below */ 142 #define SAB_RFC_RFDF 0x10 /* rfifo data format: 0 data,1 data+stat */ 161 #define SAB_XBCH_XC 0x10 /* transmit continuously */ 167 #define SAB_CCR0_SC2 0x10 /* serial port config 2, see below */ 187 #define SAB_CCR1_ODS 0x10 /* Output driver select:1:pushpull,0:odrain */ 208 #define SAB_CCR2_SSEL 0x10 /* clock source select */ 211 #define SAB_CCR2_RCS0 0x10 /* r [all...] |
H A D | starfire.c | 36 pa += CPU_UPAID * 0x10;
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/openbsd-current/include/ |
H A D | fnmatch.h | 48 #define FNM_CASEFOLD 0x10 /* Case insensitive search. */
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H A D | readpassphrase.h | 31 #define RPP_SEVENBIT 0x10 /* Strip the high bit from input. */
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/openbsd-current/sys/dev/isa/ |
H A D | if_ecreg.h | 84 #define ELINK2_GACFR_TEST 0x10 /* for GA testing */ 98 #define ELINK2_CR_SHARE 0x10 /* select interrupt sharing option */ 110 #define ELINK2_STREG_DTC 0x10 /* DMA terminal count */ 125 #define ELINK2_IDCFR_IRQ2 0x10 /* Interrupt request 2 select */
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H A D | if_ie507.h | 19 #define EL_CTRL_16BIT 0x10 /* bus width; clear = 8-bit, set = 16-bit */
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H A D | if_ieatt.h | 23 #define SL_ATTR_CODING 0x10 /* encoding: clear -> Manchester */
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H A D | if_wereg.h | 61 #define WE_ICR_RLA 0x10 /* recall LAN address */ 93 #define WE_IRR_FLASH 0x10 /* Flash RAM is in the ROM socket */ 133 #define WE790_HWR_RST 0x10 /* hardware reset */ 160 #define WE790_RAR_SZ16 0x10 /* 16k memory buffer */ 226 #define WE_NIC_OFFSET 0x10 /* I/O base offset to NIC */
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/openbsd-current/sys/dev/pci/drm/include/linux/ |
H A D | ctype.h | 25 #define _P 0x10
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/openbsd-current/sys/dev/mii/ |
H A D | tlphyreg.h | 35 #define MII_TLPHY_ID 0x10 /* ThunderLAN PHY ID */
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/ |
H A D | dcn_3_0_0_sh_mask.h | 9 #define VGA_MEM_WRITE_PAGE_ADDR__VGA_MEM_WRITE_PAGE1_ADDR__SHIFT 0x10 14 #define VGA_MEM_READ_PAGE_ADDR__VGA_MEM_READ_PAGE1_ADDR__SHIFT 0x10 22 #define VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL__SHIFT 0x10 45 #define VGA_SEQUENCER_RESET_CONTROL__VGA_MODE_AUTO_TRIGGER_ENABLE__SHIFT 0x10 67 #define VGA_MODE_CONTROL__VGA_TEXT_132_COLUMNS_EN__SHIFT 0x10 95 #define VGA_HDP_CONTROL__VGA_SOFT_RESET__SHIFT 0x10 105 #define VGA_CACHE_CONTROL__VGA_READ_BUFFER_INVALIDATE__SHIFT 0x10 117 #define D1VGA_CONTROL__D1VGA_OVERSCAN_COLOR_EN__SHIFT 0x10 128 #define D2VGA_CONTROL__D2VGA_OVERSCAN_COLOR_EN__SHIFT 0x10 147 #define VGA_INTERRUPT_CONTROL__VGA_DISPLAY_SWITCH_INT_MASK__SHIFT 0x10 [all...] |
H A D | dcn_2_0_0_sh_mask.h | 28 #define VGA_MEM_WRITE_PAGE_ADDR__VGA_MEM_WRITE_PAGE1_ADDR__SHIFT 0x10 33 #define VGA_MEM_READ_PAGE_ADDR__VGA_MEM_READ_PAGE1_ADDR__SHIFT 0x10 41 #define VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL__SHIFT 0x10 64 #define VGA_SEQUENCER_RESET_CONTROL__VGA_MODE_AUTO_TRIGGER_ENABLE__SHIFT 0x10 86 #define VGA_MODE_CONTROL__VGA_TEXT_132_COLUMNS_EN__SHIFT 0x10 114 #define VGA_HDP_CONTROL__VGA_SOFT_RESET__SHIFT 0x10 124 #define VGA_CACHE_CONTROL__VGA_READ_BUFFER_INVALIDATE__SHIFT 0x10 136 #define D1VGA_CONTROL__D1VGA_OVERSCAN_COLOR_EN__SHIFT 0x10 147 #define D2VGA_CONTROL__D2VGA_OVERSCAN_COLOR_EN__SHIFT 0x10 166 #define VGA_INTERRUPT_CONTROL__VGA_DISPLAY_SWITCH_INT_MASK__SHIFT 0x10 [all...] |
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/smu/ |
H A D | smu_7_0_0_sh_mask.h | 83 #define GCK_DFS_BYPASS_CNTL__BYPASSVCLK_MASK 0x10 109 #define CG_SPLL_FUNC_CNTL__SPLL_BYPASS_THRU_DFS_MASK 0x10 198 #define CG_SPLL_FUNC_CNTL_6__SPLL_VCTL_EN__SHIFT 0x10 215 #define SPLL_CNTL_MODE__SPLL_ENSAT_MASK 0x10 248 #define CG_CLKPIN_CNTL_2__XO_IN_CML_RXEN__SHIFT 0x10 268 #define THM_CLK_CNTL__CTF_CLK_SHUTOFF_EN__SHIFT 0x10 274 #define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT 0x10 351 #define SMC_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_4_MASK 0x10 482 #define RCU_UC_EVENTS__INTERRUPTS_ENABLED__SHIFT 0x10 495 #define RCU_MISC_CTRL__REG_CC_FUSE_DISABLE_MASK 0x10 [all...] |
/openbsd-current/sys/arch/luna88k/stand/boot/ |
H A D | sioreg.h | 113 #define WR0_RSTINT 0x10 /* Reset External/Status Interrupt */ 125 #define WR1_RXALLS 0x10 /* Interrupt Every Characters Received (with Special Char.) */ 132 #define WR2_VEC86 0x10 /* 8086 Vectored */ 156 #define WR5_BREAK 0x10 /* Send Break */ 168 #define RR1_PARITY 0x10 /* Parity Error */
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gmc/ |
H A D | gmc_8_1_sh_mask.h | 35 #define MC_CONFIG__MCDS_WR_ENABLE_MASK 0x10 58 #define MC_ARB_ATOMIC__ATOMIC_RTN_GRP__SHIFT 0x10 67 #define MC_ARB_AGE_CNTL__RESET_RD_GROUP4_MASK 0x10 92 #define MC_ARB_AGE_CNTL__AGE_LOW_RATE_RD__SHIFT 0x10 122 #define MC_ARB_RET_CREDITS2__RDRET_CREDIT_MED__SHIFT 0x10 127 #define MC_ARB_FED_CNTL__KEEP_POISON_IN_PAGE_MASK 0x10 143 #define MC_ARB_GECC2_STATUS__CORR_STS1_MASK 0x10 168 #define MC_ARB_GECC2_STATUS__RMWRD_CORR_STS0__SHIFT 0x10 191 #define MC_ARB_GECC2_MISC__COL10_HACK_MASK 0x10 224 #define MC_ARB_GECC2_DEBUG2__ERR1_START__SHIFT 0x10 [all...] |
/openbsd-current/regress/lib/libssl/unit/ |
H A D | tls_ext_alpn.c | 42 0x00, 0x10, /* ALPN */ 57 0x00, 0x10, /* ALPN */ 75 0x00, 0x10, /* ALPN */ 96 0x00, 0x10, /* ALPN */ 125 0x00, 0x10, /* ALPN */ 138 0x00, 0x10, /* ALPN */ 151 0x00, 0x10, /* ALPN */ 164 0x00, 0x10, /* ALPN */ 177 0x00, 0x10, /* ALPN */ 190 0x00, 0x10, /* ALP [all...] |