/openbsd-current/gnu/llvm/compiler-rt/lib/fuzzer/ |
H A D | FuzzerLoop.cpp | 398 if (!PCsSet->insert(TE->PC).second) 400 std::string Descr = DescribePC("%F %L", TE->PC + 1);
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H A D | FuzzerFork.cpp | 259 TPC.GetNextInstructionPc(TE->PC));
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/openbsd-current/gnu/llvm/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 1106 // applied to PC. the offset may have 8 bits of magnitude and is represented 1119 if(Memory.BaseRegNum != ARM::PC) return false; 1507 // Base register must be PC. 1508 if (Memory.BaseRegNum != ARM::PC) 1715 Memory.Alignment != 0 || Memory.BaseRegNum == ARM::PC) 1841 // Base reg of PC isn't allowed for these encodings. 1842 if (Memory.BaseRegNum == ARM::PC) return false; 1948 // Base reg of PC isn't allowed for these encodings. 1949 if (Memory.BaseRegNum == ARM::PC) return false; 4097 .Case("r15", ARM::PC) [all...] |
/openbsd-current/gnu/gcc/gcc/ |
H A D | sched-vis.c | 499 case PC:
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H A D | caller-save.c | 575 || code == PC || code == CC0
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H A D | emit-rtl.c | 2210 case PC: 2412 case PC: 2532 case PC: 2601 case PC: 4865 case PC:
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/openbsd-current/gnu/usr.bin/binutils/opcodes/ |
H A D | ip2k-desc.c | 79 { "PC", &bool_attr[0], &bool_attr[0] }, 286 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
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H A D | openrisc-desc.c | 86 { "PC", &bool_attr[0], &bool_attr[0] }, 199 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
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/openbsd-current/gnu/usr.bin/binutils-2.17/gas/ |
H A D | bfin-parse.c | 83 PC = 282, enumerator in enum:yytokentype 258 #define PC 282 macro 1302 "PC", "CCREG", "BYTE_DREG", "REG_A_DOUBLE_ZERO", "REG_A_DOUBLE_ONE", 5023 notethat ("ProgCtrl: CALL (PC + pregs )\n"); 5036 notethat ("ProgCtrl: JUMP (PC + pregs )\n");
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/openbsd-current/gnu/usr.bin/gcc/gcc/ |
H A D | caller-save.c | 579 if (code == REG || code == PC || code == CC0
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H A D | gcse.c | 1401 case PC: 1701 case PC: 1828 case PC: 2772 case PC: 3111 case PC: 3819 case PC: 6884 case PC:
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/openbsd-current/gnu/usr.bin/binutils-2.17/opcodes/ |
H A D | ip2k-desc.c | 79 { "PC", &bool_attr[0], &bool_attr[0] }, 286 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
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H A D | openrisc-desc.c | 86 { "PC", &bool_attr[0], &bool_attr[0] }, 199 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
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/openbsd-current/gnu/llvm/lldb/source/Plugins/Platform/Windows/ |
H A D | PlatformWindows.cpp | 54 case llvm::Triple::PC:
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/openbsd-current/gnu/llvm/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 116 SP::OTHERWIN, SP::WSTATE, SP::PC
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/openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCTargetDesc.cpp | 313 /*EHFlavour=*/0, /*PC=*/Hexagon::PC);
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/openbsd-current/gnu/llvm/llvm/include/llvm/TargetParser/ |
H A D | Triple.h | 170 PC, enumerator in enum:llvm::Triple::VendorType
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/openbsd-current/gnu/llvm/lldb/source/Plugins/Process/minidump/ |
H A D | MinidumpParser.cpp | 181 triple.setVendor(llvm::Triple::VendorType::PC);
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/openbsd-current/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.cpp | 487 if ((Reg == Mips::PC) || (Reg == Mips::SP))
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/openbsd-current/gnu/gcc/gcc/config/arc/ |
H A D | arc.c | 2069 || (GET_CODE (body) == SET && GET_CODE (SET_DEST (body)) == PC 2169 /* ??? Probably, the test for the SET and the PC are unnecessary. */ 2172 && GET_CODE (SET_DEST (scanbody)) == PC)
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/openbsd-current/gnu/usr.bin/gcc/gcc/config/arc/ |
H A D | arc.c | 2050 || (GET_CODE (body) == SET && GET_CODE (SET_DEST (body)) == PC 2150 /* ??? Probably, the test for the SET and the PC are unnecessary. */ 2153 && GET_CODE (SET_DEST (scanbody)) == PC)
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/openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | BitTracker.cpp | 715 const TargetRegisterClass &PC = *TRI.getMinimalPhysRegClass(Reg); 716 return TRI.getRegSizeInBits(PC);
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/openbsd-current/gnu/llvm/llvm/lib/Transforms/Scalar/ |
H A D | LoopUnrollPass.cpp | 322 PragmaInfo(bool UUC, bool PFU, unsigned PC, bool PEU) argument 323 : UserUnrollCount(UUC), PragmaFullUnroll(PFU), PragmaCount(PC),
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/openbsd-current/gnu/llvm/llvm/lib/DebugInfo/DWARF/ |
H A D | DWARFUnit.cpp | 1053 std::optional<DWARFFormValue> PC = local 1055 BaseAddr = toSectionedAddress(PC);
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/openbsd-current/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMELFStreamer.cpp | 153 assert((Reg != ARM::SP && Reg != ARM::PC) && 1380 assert((Reg != ARM::SP && Reg != ARM::PC) &&
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