Searched refs:__raw_readl (Results 76 - 100 of 171) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-s3c24xx/
H A Dclock.c271 unsigned long dclkcon = __raw_readl(S3C24XX_DCLKCON);
297 dclkcon = __raw_readl(S3C24XX_DCLKCON);
431 clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal);
H A Dcpu.c191 return __raw_readl(S3C2412_GSTATUS1);
200 return __raw_readl(S3C2410_GSTATUS1);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/input/mouse/
H A Drpcmouse.c45 b = (short) (__raw_readl(0xe0310000) ^ 0x70);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/hw_random/
H A Domap-rng.c59 return __raw_readl(rng_base + reg);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-omap2/
H A Did.c55 return __raw_readl(OMAP24XX_TAP_BASE + reg);
H A Dclock.c152 if (!(__raw_readl(other_reg) & bit))
156 while (!(__raw_readl(st_reg) & bit)) {
193 regval32 = __raw_readl(clk->enable_reg);
234 regval32 = __raw_readl(clk->enable_reg);
685 reg_val = __raw_readl((void __iomem *)div_addr) & (mask << div_off);
764 reg_val = __raw_readl(reg);
907 reg_val = __raw_readl(reg) & ~(field_mask << src_off);
1033 regval32 = __raw_readl(clk->enable_reg);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-realview/
H A Dcore.c72 val = __raw_readl(REALVIEW_FLASHCTRL);
83 val = __raw_readl(REALVIEW_FLASHCTRL);
92 val = __raw_readl(REALVIEW_FLASHCTRL);
504 status = __raw_readl(__io_address(REALVIEW_GIC_DIST_BASE + GIC_DIST_PENDING_SET)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/avr32/mach-at32ap/
H A Dpio.h174 __raw_readl((port)->regs + PIO_##reg)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/spi/
H A Datmel_spi.h163 __raw_readl((port)->regs + SPI_##reg)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/usb/gadget/
H A Dat91_udc.c83 __raw_readl((dev)->udp_baseaddr + (reg))
110 csr = __raw_readl(ep->creg);
335 csr = __raw_readl(creg);
390 u32 csr = __raw_readl(creg);
411 csr = __raw_readl(creg);
693 tmp = __raw_readl(ep->creg);
759 csr = __raw_readl(creg);
1007 u32 csr = __raw_readl(creg);
1032 csr = __raw_readl(creg);
1093 csr = __raw_readl(cre
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/pcmcia/
H A Dmem_op.h38 put_user(__raw_readl(from), (int *)to);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-m32r/
H A Dio.h153 #define __raw_readl readl macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-alpha/
H A Dio.h257 extern u32 __raw_readl(const volatile void __iomem *addr);
440 extern inline u32 __raw_readl(const volatile void __iomem *addr) function
462 u32 ret = __raw_readl(addr);
495 #define readl_relaxed(addr) __raw_readl(addr)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-iop13xx/
H A Diop13xx.h468 #define is_atue_occdr_error(x) ((__raw_readl(IOP13XX_XBG_BERAR) == \
471 && (__raw_readl(IOP13XX_XBG_BECSR) & 1))
472 #define is_atux_occdr_error(x) ((__raw_readl(IOP13XX_XBG_BERAR) == \
475 && (__raw_readl(IOP13XX_XBG_BECSR) & 1))
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/
H A Dio.h55 #define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) macro
122 __raw_readl(__io(p))); __v; })
171 __raw_readl(__mem_pci(c))); __v; })
232 #define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/alpha/kernel/
H A Dio.c109 u32 __raw_readl(const volatile void __iomem *addr) function
141 EXPORT_SYMBOL(__raw_readl); variable
164 u32 ret = __raw_readl(addr);
439 *(u32 *)to = __raw_readl(from);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/watchdog/
H A Dpnx4008_wdt.c106 while (__raw_readl(WDTIM_COUNTER(wdt_base)))
301 boot_status = (__raw_readl(WDTIM_RES(wdt_base)) & WDOG_RESET) ?
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-ebsa110/
H A Dio.c51 ret = __raw_readl(a);
184 ret = __raw_readl(a);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-pnx4008/
H A Dgpio.c63 val = __raw_readl(PIO_VA_BASE + reg);
80 val = __raw_readl(PIO_VA_BASE + reg);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2443/
H A Dirq.c52 subsrc = __raw_readl(S3C2410_SUBSRCPND);
53 submsk = __raw_readl(S3C2410_INTSUBMSK);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/parisc/
H A Ddino.c221 __raw_readl(base_addr + DINO_CONFIG_DATA);
322 __raw_readl(dino_dev->hba.base_addr+DINO_IPR);
337 tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR);
378 mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK;
400 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr;
704 status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS);
769 io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN);
881 __raw_readl(dino_dev->hba.base_addr+DINO_IRR0);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-parisc/
H A Dio.h147 static inline unsigned int __raw_readl(const volatile void __iomem *addr) function
176 #define readl(addr) __fswab32(__raw_readl(addr))
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/lib/
H A Diomap.c69 #define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr))
165 u32 data = __raw_readl(addr);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/serial/
H A Datmel_serial.c78 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
82 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
83 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
84 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
86 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
90 // #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
94 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
97 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
H A Dsa1100.c64 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
65 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
66 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
67 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
68 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
69 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
70 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)

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