1/* 2 * linux/drivers/char/atmel_serial.c 3 * 4 * Driver for Atmel AT91 / AT32 Serial ports 5 * Copyright (C) 2003 Rick Bronson 6 * 7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. 8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25#include <linux/module.h> 26#include <linux/tty.h> 27#include <linux/ioport.h> 28#include <linux/slab.h> 29#include <linux/init.h> 30#include <linux/serial.h> 31#include <linux/clk.h> 32#include <linux/console.h> 33#include <linux/sysrq.h> 34#include <linux/tty_flip.h> 35#include <linux/platform_device.h> 36#include <linux/atmel_pdc.h> 37 38#include <asm/io.h> 39 40#include <asm/mach/serial_at91.h> 41#include <asm/arch/board.h> 42 43#ifdef CONFIG_ARM 44#include <asm/arch/cpu.h> 45#include <asm/arch/gpio.h> 46#endif 47 48#include "atmel_serial.h" 49 50#if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 51#define SUPPORT_SYSRQ 52#endif 53 54#include <linux/serial_core.h> 55 56#ifdef CONFIG_SERIAL_ATMEL_TTYAT 57 58/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we 59 * should coexist with the 8250 driver, such as if we have an external 16C550 60 * UART. */ 61#define SERIAL_ATMEL_MAJOR 204 62#define MINOR_START 154 63#define ATMEL_DEVICENAME "ttyAT" 64 65#else 66 67/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port 68 * name, but it is legally reserved for the 8250 driver. */ 69#define SERIAL_ATMEL_MAJOR TTY_MAJOR 70#define MINOR_START 64 71#define ATMEL_DEVICENAME "ttyS" 72 73#endif 74 75#define ATMEL_ISR_PASS_LIMIT 256 76 77#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) 78#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) 79#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) 80#define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER) 81#define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR) 82#define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR) 83#define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR) 84#define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR) 85#define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR) 86#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) 87#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) 88#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) 89 90// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only 91 92 /* PDC registers */ 93#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) 94#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) 95 96#define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR) 97#define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR) 98#define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR) 99#define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR) 100#define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR) 101 102#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) 103#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) 104//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR) 105//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR) 106 107static int (*atmel_open_hook)(struct uart_port *); 108static void (*atmel_close_hook)(struct uart_port *); 109 110/* 111 * We wrap our port structure around the generic uart_port. 112 */ 113struct atmel_uart_port { 114 struct uart_port uart; /* uart */ 115 struct clk *clk; /* uart clock */ 116 unsigned short suspended; /* is port suspended? */ 117}; 118 119static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; 120 121#ifdef SUPPORT_SYSRQ 122static struct console atmel_console; 123#endif 124 125/* 126 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. 127 */ 128static u_int atmel_tx_empty(struct uart_port *port) 129{ 130 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0; 131} 132 133/* 134 * Set state of the modem control output lines 135 */ 136static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) 137{ 138 unsigned int control = 0; 139 unsigned int mode; 140 141#ifdef CONFIG_ARCH_AT91RM9200 142 if (cpu_is_at91rm9200()) { 143 /* 144 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21. 145 * We need to drive the pin manually. 146 */ 147 if (port->mapbase == AT91RM9200_BASE_US0) { 148 if (mctrl & TIOCM_RTS) 149 at91_set_gpio_value(AT91_PIN_PA21, 0); 150 else 151 at91_set_gpio_value(AT91_PIN_PA21, 1); 152 } 153 } 154#endif 155 156 if (mctrl & TIOCM_RTS) 157 control |= ATMEL_US_RTSEN; 158 else 159 control |= ATMEL_US_RTSDIS; 160 161 if (mctrl & TIOCM_DTR) 162 control |= ATMEL_US_DTREN; 163 else 164 control |= ATMEL_US_DTRDIS; 165 166 UART_PUT_CR(port, control); 167 168 /* Local loopback mode? */ 169 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE; 170 if (mctrl & TIOCM_LOOP) 171 mode |= ATMEL_US_CHMODE_LOC_LOOP; 172 else 173 mode |= ATMEL_US_CHMODE_NORMAL; 174 UART_PUT_MR(port, mode); 175} 176 177/* 178 * Get state of the modem control input lines 179 */ 180static u_int atmel_get_mctrl(struct uart_port *port) 181{ 182 unsigned int status, ret = 0; 183 184 status = UART_GET_CSR(port); 185 186 /* 187 * The control signals are active low. 188 */ 189 if (!(status & ATMEL_US_DCD)) 190 ret |= TIOCM_CD; 191 if (!(status & ATMEL_US_CTS)) 192 ret |= TIOCM_CTS; 193 if (!(status & ATMEL_US_DSR)) 194 ret |= TIOCM_DSR; 195 if (!(status & ATMEL_US_RI)) 196 ret |= TIOCM_RI; 197 198 return ret; 199} 200 201/* 202 * Stop transmitting. 203 */ 204static void atmel_stop_tx(struct uart_port *port) 205{ 206 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 207 208 UART_PUT_IDR(port, ATMEL_US_TXRDY); 209} 210 211/* 212 * Start transmitting. 213 */ 214static void atmel_start_tx(struct uart_port *port) 215{ 216 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 217 218 UART_PUT_IER(port, ATMEL_US_TXRDY); 219} 220 221/* 222 * Stop receiving - port is in process of being closed. 223 */ 224static void atmel_stop_rx(struct uart_port *port) 225{ 226 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 227 228 UART_PUT_IDR(port, ATMEL_US_RXRDY); 229} 230 231/* 232 * Enable modem status interrupts 233 */ 234static void atmel_enable_ms(struct uart_port *port) 235{ 236 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC); 237} 238 239/* 240 * Control the transmission of a break signal 241 */ 242static void atmel_break_ctl(struct uart_port *port, int break_state) 243{ 244 if (break_state != 0) 245 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */ 246 else 247 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */ 248} 249 250/* 251 * Characters received (called from interrupt handler) 252 */ 253static void atmel_rx_chars(struct uart_port *port) 254{ 255 struct tty_struct *tty = port->info->tty; 256 unsigned int status, ch, flg; 257 258 status = UART_GET_CSR(port); 259 while (status & ATMEL_US_RXRDY) { 260 ch = UART_GET_CHAR(port); 261 262 port->icount.rx++; 263 264 flg = TTY_NORMAL; 265 266 /* 267 * note that the error handling code is 268 * out of the main execution path 269 */ 270 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) { 271 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */ 272 if (status & ATMEL_US_RXBRK) { 273 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */ 274 port->icount.brk++; 275 if (uart_handle_break(port)) 276 goto ignore_char; 277 } 278 if (status & ATMEL_US_PARE) 279 port->icount.parity++; 280 if (status & ATMEL_US_FRAME) 281 port->icount.frame++; 282 if (status & ATMEL_US_OVRE) 283 port->icount.overrun++; 284 285 status &= port->read_status_mask; 286 287 if (status & ATMEL_US_RXBRK) 288 flg = TTY_BREAK; 289 else if (status & ATMEL_US_PARE) 290 flg = TTY_PARITY; 291 else if (status & ATMEL_US_FRAME) 292 flg = TTY_FRAME; 293 } 294 295 if (uart_handle_sysrq_char(port, ch)) 296 goto ignore_char; 297 298 uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg); 299 300 ignore_char: 301 status = UART_GET_CSR(port); 302 } 303 304 tty_flip_buffer_push(tty); 305} 306 307/* 308 * Transmit characters (called from interrupt handler) 309 */ 310static void atmel_tx_chars(struct uart_port *port) 311{ 312 struct circ_buf *xmit = &port->info->xmit; 313 314 if (port->x_char) { 315 UART_PUT_CHAR(port, port->x_char); 316 port->icount.tx++; 317 port->x_char = 0; 318 return; 319 } 320 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 321 atmel_stop_tx(port); 322 return; 323 } 324 325 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) { 326 UART_PUT_CHAR(port, xmit->buf[xmit->tail]); 327 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 328 port->icount.tx++; 329 if (uart_circ_empty(xmit)) 330 break; 331 } 332 333 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 334 uart_write_wakeup(port); 335 336 if (uart_circ_empty(xmit)) 337 atmel_stop_tx(port); 338} 339 340/* 341 * Interrupt handler 342 */ 343static irqreturn_t atmel_interrupt(int irq, void *dev_id) 344{ 345 struct uart_port *port = dev_id; 346 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 347 unsigned int status, pending, pass_counter = 0; 348 349 status = UART_GET_CSR(port); 350 pending = status & UART_GET_IMR(port); 351 while (pending) { 352 /* Interrupt receive */ 353 if (pending & ATMEL_US_RXRDY) 354 atmel_rx_chars(port); 355 356 // TODO: All reads to CSR will clear these interrupts! 357 if (pending & ATMEL_US_RIIC) port->icount.rng++; 358 if (pending & ATMEL_US_DSRIC) port->icount.dsr++; 359 if (pending & ATMEL_US_DCDIC) 360 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD)); 361 if (pending & ATMEL_US_CTSIC) 362 uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); 363 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC)) 364 wake_up_interruptible(&port->info->delta_msr_wait); 365 366 /* Interrupt transmit */ 367 if (pending & ATMEL_US_TXRDY) 368 atmel_tx_chars(port); 369 370 if (pass_counter++ > ATMEL_ISR_PASS_LIMIT) 371 break; 372 373 status = UART_GET_CSR(port); 374 pending = status & UART_GET_IMR(port); 375 } 376 return IRQ_HANDLED; 377} 378 379/* 380 * Perform initialization and enable port for reception 381 */ 382static int atmel_startup(struct uart_port *port) 383{ 384 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 385 int retval; 386 387 /* 388 * Ensure that no interrupts are enabled otherwise when 389 * request_irq() is called we could get stuck trying to 390 * handle an unexpected interrupt 391 */ 392 UART_PUT_IDR(port, -1); 393 394 /* 395 * Allocate the IRQ 396 */ 397 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port); 398 if (retval) { 399 printk("atmel_serial: atmel_startup - Can't get irq\n"); 400 return retval; 401 } 402 403 /* 404 * If there is a specific "open" function (to register 405 * control line interrupts) 406 */ 407 if (atmel_open_hook) { 408 retval = atmel_open_hook(port); 409 if (retval) { 410 free_irq(port->irq, port); 411 return retval; 412 } 413 } 414 415 /* 416 * Finally, enable the serial port 417 */ 418 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 419 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */ 420 421 UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */ 422 423 return 0; 424} 425 426/* 427 * Disable the port 428 */ 429static void atmel_shutdown(struct uart_port *port) 430{ 431 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 432 433 /* 434 * Disable all interrupts, port and break condition. 435 */ 436 UART_PUT_CR(port, ATMEL_US_RSTSTA); 437 UART_PUT_IDR(port, -1); 438 439 /* 440 * Free the interrupt 441 */ 442 free_irq(port->irq, port); 443 444 /* 445 * If there is a specific "close" function (to unregister 446 * control line interrupts) 447 */ 448 if (atmel_close_hook) 449 atmel_close_hook(port); 450} 451 452/* 453 * Power / Clock management. 454 */ 455static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) 456{ 457 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 458 459 switch (state) { 460 case 0: 461 /* 462 * Enable the peripheral clock for this serial port. 463 * This is called on uart_open() or a resume event. 464 */ 465 clk_enable(atmel_port->clk); 466 break; 467 case 3: 468 /* 469 * Disable the peripheral clock for this serial port. 470 * This is called on uart_close() or a suspend event. 471 */ 472 clk_disable(atmel_port->clk); 473 break; 474 default: 475 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); 476 } 477} 478 479/* 480 * Change the port parameters 481 */ 482static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old) 483{ 484 unsigned long flags; 485 unsigned int mode, imr, quot, baud; 486 487 /* Get current mode register */ 488 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR); 489 490 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 491 quot = uart_get_divisor(port, baud); 492 493 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ 494 quot /= 8; 495 mode |= ATMEL_US_USCLKS_MCK_DIV8; 496 } 497 498 /* byte size */ 499 switch (termios->c_cflag & CSIZE) { 500 case CS5: 501 mode |= ATMEL_US_CHRL_5; 502 break; 503 case CS6: 504 mode |= ATMEL_US_CHRL_6; 505 break; 506 case CS7: 507 mode |= ATMEL_US_CHRL_7; 508 break; 509 default: 510 mode |= ATMEL_US_CHRL_8; 511 break; 512 } 513 514 /* stop bits */ 515 if (termios->c_cflag & CSTOPB) 516 mode |= ATMEL_US_NBSTOP_2; 517 518 /* parity */ 519 if (termios->c_cflag & PARENB) { 520 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */ 521 if (termios->c_cflag & PARODD) 522 mode |= ATMEL_US_PAR_MARK; 523 else 524 mode |= ATMEL_US_PAR_SPACE; 525 } 526 else if (termios->c_cflag & PARODD) 527 mode |= ATMEL_US_PAR_ODD; 528 else 529 mode |= ATMEL_US_PAR_EVEN; 530 } 531 else 532 mode |= ATMEL_US_PAR_NONE; 533 534 spin_lock_irqsave(&port->lock, flags); 535 536 port->read_status_mask = ATMEL_US_OVRE; 537 if (termios->c_iflag & INPCK) 538 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); 539 if (termios->c_iflag & (BRKINT | PARMRK)) 540 port->read_status_mask |= ATMEL_US_RXBRK; 541 542 /* 543 * Characters to ignore 544 */ 545 port->ignore_status_mask = 0; 546 if (termios->c_iflag & IGNPAR) 547 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); 548 if (termios->c_iflag & IGNBRK) { 549 port->ignore_status_mask |= ATMEL_US_RXBRK; 550 /* 551 * If we're ignoring parity and break indicators, 552 * ignore overruns too (for real raw support). 553 */ 554 if (termios->c_iflag & IGNPAR) 555 port->ignore_status_mask |= ATMEL_US_OVRE; 556 } 557 558 // TODO: Ignore all characters if CREAD is set. 559 560 /* update the per-port timeout */ 561 uart_update_timeout(port, termios->c_cflag, baud); 562 563 /* disable interrupts and drain transmitter */ 564 imr = UART_GET_IMR(port); /* get interrupt mask */ 565 UART_PUT_IDR(port, -1); /* disable all interrupts */ 566 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); } 567 568 /* disable receiver and transmitter */ 569 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); 570 571 /* set the parity, stop bits and data size */ 572 UART_PUT_MR(port, mode); 573 574 /* set the baud rate */ 575 UART_PUT_BRGR(port, quot); 576 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 577 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 578 579 /* restore interrupts */ 580 UART_PUT_IER(port, imr); 581 582 /* CTS flow-control and modem-status interrupts */ 583 if (UART_ENABLE_MS(port, termios->c_cflag)) 584 port->ops->enable_ms(port); 585 586 spin_unlock_irqrestore(&port->lock, flags); 587} 588 589/* 590 * Return string describing the specified port 591 */ 592static const char *atmel_type(struct uart_port *port) 593{ 594 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL; 595} 596 597/* 598 * Release the memory region(s) being used by 'port'. 599 */ 600static void atmel_release_port(struct uart_port *port) 601{ 602 struct platform_device *pdev = to_platform_device(port->dev); 603 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 604 605 release_mem_region(port->mapbase, size); 606 607 if (port->flags & UPF_IOREMAP) { 608 iounmap(port->membase); 609 port->membase = NULL; 610 } 611} 612 613/* 614 * Request the memory region(s) being used by 'port'. 615 */ 616static int atmel_request_port(struct uart_port *port) 617{ 618 struct platform_device *pdev = to_platform_device(port->dev); 619 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 620 621 if (!request_mem_region(port->mapbase, size, "atmel_serial")) 622 return -EBUSY; 623 624 if (port->flags & UPF_IOREMAP) { 625 port->membase = ioremap(port->mapbase, size); 626 if (port->membase == NULL) { 627 release_mem_region(port->mapbase, size); 628 return -ENOMEM; 629 } 630 } 631 632 return 0; 633} 634 635/* 636 * Configure/autoconfigure the port. 637 */ 638static void atmel_config_port(struct uart_port *port, int flags) 639{ 640 if (flags & UART_CONFIG_TYPE) { 641 port->type = PORT_ATMEL; 642 atmel_request_port(port); 643 } 644} 645 646/* 647 * Verify the new serial_struct (for TIOCSSERIAL). 648 */ 649static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser) 650{ 651 int ret = 0; 652 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL) 653 ret = -EINVAL; 654 if (port->irq != ser->irq) 655 ret = -EINVAL; 656 if (ser->io_type != SERIAL_IO_MEM) 657 ret = -EINVAL; 658 if (port->uartclk / 16 != ser->baud_base) 659 ret = -EINVAL; 660 if ((void *)port->mapbase != ser->iomem_base) 661 ret = -EINVAL; 662 if (port->iobase != ser->port) 663 ret = -EINVAL; 664 if (ser->hub6 != 0) 665 ret = -EINVAL; 666 return ret; 667} 668 669static struct uart_ops atmel_pops = { 670 .tx_empty = atmel_tx_empty, 671 .set_mctrl = atmel_set_mctrl, 672 .get_mctrl = atmel_get_mctrl, 673 .stop_tx = atmel_stop_tx, 674 .start_tx = atmel_start_tx, 675 .stop_rx = atmel_stop_rx, 676 .enable_ms = atmel_enable_ms, 677 .break_ctl = atmel_break_ctl, 678 .startup = atmel_startup, 679 .shutdown = atmel_shutdown, 680 .set_termios = atmel_set_termios, 681 .type = atmel_type, 682 .release_port = atmel_release_port, 683 .request_port = atmel_request_port, 684 .config_port = atmel_config_port, 685 .verify_port = atmel_verify_port, 686 .pm = atmel_serial_pm, 687}; 688 689/* 690 * Configure the port from the platform device resource info. 691 */ 692static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev) 693{ 694 struct uart_port *port = &atmel_port->uart; 695 struct atmel_uart_data *data = pdev->dev.platform_data; 696 697 port->iotype = UPIO_MEM; 698 port->flags = UPF_BOOT_AUTOCONF; 699 port->ops = &atmel_pops; 700 port->fifosize = 1; 701 port->line = pdev->id; 702 port->dev = &pdev->dev; 703 704 port->mapbase = pdev->resource[0].start; 705 port->irq = pdev->resource[1].start; 706 707 if (data->regs) 708 /* Already mapped by setup code */ 709 port->membase = data->regs; 710 else { 711 port->flags |= UPF_IOREMAP; 712 port->membase = NULL; 713 } 714 715 if (!atmel_port->clk) { /* for console, the clock could already be configured */ 716 atmel_port->clk = clk_get(&pdev->dev, "usart"); 717 clk_enable(atmel_port->clk); 718 port->uartclk = clk_get_rate(atmel_port->clk); 719 } 720} 721 722/* 723 * Register board-specific modem-control line handlers. 724 */ 725void __init atmel_register_uart_fns(struct atmel_port_fns *fns) 726{ 727 if (fns->enable_ms) 728 atmel_pops.enable_ms = fns->enable_ms; 729 if (fns->get_mctrl) 730 atmel_pops.get_mctrl = fns->get_mctrl; 731 if (fns->set_mctrl) 732 atmel_pops.set_mctrl = fns->set_mctrl; 733 atmel_open_hook = fns->open; 734 atmel_close_hook = fns->close; 735 atmel_pops.pm = fns->pm; 736 atmel_pops.set_wake = fns->set_wake; 737} 738 739 740#ifdef CONFIG_SERIAL_ATMEL_CONSOLE 741static void atmel_console_putchar(struct uart_port *port, int ch) 742{ 743 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) 744 barrier(); 745 UART_PUT_CHAR(port, ch); 746} 747 748/* 749 * Interrupts are disabled on entering 750 */ 751static void atmel_console_write(struct console *co, const char *s, u_int count) 752{ 753 struct uart_port *port = &atmel_ports[co->index].uart; 754 unsigned int status, imr; 755 756 /* 757 * First, save IMR and then disable interrupts 758 */ 759 imr = UART_GET_IMR(port); /* get interrupt mask */ 760 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY); 761 762 uart_console_write(port, s, count, atmel_console_putchar); 763 764 /* 765 * Finally, wait for transmitter to become empty 766 * and restore IMR 767 */ 768 do { 769 status = UART_GET_CSR(port); 770 } while (!(status & ATMEL_US_TXRDY)); 771 UART_PUT_IER(port, imr); /* set interrupts back the way they were */ 772} 773 774/* 775 * If the port was already initialised (eg, by a boot loader), try to determine 776 * the current setup. 777 */ 778static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits) 779{ 780 unsigned int mr, quot; 781 782// TODO: CR is a write-only register 783// unsigned int cr; 784// 785// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN); 786// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) { 787// /* ok, the port was enabled */ 788// } 789 790 mr = UART_GET_MR(port) & ATMEL_US_CHRL; 791 if (mr == ATMEL_US_CHRL_8) 792 *bits = 8; 793 else 794 *bits = 7; 795 796 mr = UART_GET_MR(port) & ATMEL_US_PAR; 797 if (mr == ATMEL_US_PAR_EVEN) 798 *parity = 'e'; 799 else if (mr == ATMEL_US_PAR_ODD) 800 *parity = 'o'; 801 802 /* 803 * The serial core only rounds down when matching this to a 804 * supported baud rate. Make sure we don't end up slightly 805 * lower than one of those, as it would make us fall through 806 * to a much lower baud rate than we really want. 807 */ 808 quot = UART_GET_BRGR(port); 809 *baud = port->uartclk / (16 * (quot - 1)); 810} 811 812static int __init atmel_console_setup(struct console *co, char *options) 813{ 814 struct uart_port *port = &atmel_ports[co->index].uart; 815 int baud = 115200; 816 int bits = 8; 817 int parity = 'n'; 818 int flow = 'n'; 819 820 if (port->membase == 0) /* Port not initialized yet - delay setup */ 821 return -ENODEV; 822 823 UART_PUT_IDR(port, -1); /* disable interrupts */ 824 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 825 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 826 827 if (options) 828 uart_parse_options(options, &baud, &parity, &bits, &flow); 829 else 830 atmel_console_get_options(port, &baud, &parity, &bits); 831 832 return uart_set_options(port, co, baud, parity, bits, flow); 833} 834 835static struct uart_driver atmel_uart; 836 837static struct console atmel_console = { 838 .name = ATMEL_DEVICENAME, 839 .write = atmel_console_write, 840 .device = uart_console_device, 841 .setup = atmel_console_setup, 842 .flags = CON_PRINTBUFFER, 843 .index = -1, 844 .data = &atmel_uart, 845}; 846 847#define ATMEL_CONSOLE_DEVICE &atmel_console 848 849/* 850 * Early console initialization (before VM subsystem initialized). 851 */ 852static int __init atmel_console_init(void) 853{ 854 if (atmel_default_console_device) { 855 add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL); 856 atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device); 857 register_console(&atmel_console); 858 } 859 860 return 0; 861} 862console_initcall(atmel_console_init); 863 864/* 865 * Late console initialization. 866 */ 867static int __init atmel_late_console_init(void) 868{ 869 if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED)) 870 register_console(&atmel_console); 871 872 return 0; 873} 874core_initcall(atmel_late_console_init); 875 876#else 877#define ATMEL_CONSOLE_DEVICE NULL 878#endif 879 880static struct uart_driver atmel_uart = { 881 .owner = THIS_MODULE, 882 .driver_name = "atmel_serial", 883 .dev_name = ATMEL_DEVICENAME, 884 .major = SERIAL_ATMEL_MAJOR, 885 .minor = MINOR_START, 886 .nr = ATMEL_MAX_UART, 887 .cons = ATMEL_CONSOLE_DEVICE, 888}; 889 890#ifdef CONFIG_PM 891static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state) 892{ 893 struct uart_port *port = platform_get_drvdata(pdev); 894 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 895 896 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock()) 897 enable_irq_wake(port->irq); 898 else { 899 uart_suspend_port(&atmel_uart, port); 900 atmel_port->suspended = 1; 901 } 902 903 return 0; 904} 905 906static int atmel_serial_resume(struct platform_device *pdev) 907{ 908 struct uart_port *port = platform_get_drvdata(pdev); 909 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 910 911 if (atmel_port->suspended) { 912 uart_resume_port(&atmel_uart, port); 913 atmel_port->suspended = 0; 914 } 915 else 916 disable_irq_wake(port->irq); 917 918 return 0; 919} 920#else 921#define atmel_serial_suspend NULL 922#define atmel_serial_resume NULL 923#endif 924 925static int __devinit atmel_serial_probe(struct platform_device *pdev) 926{ 927 struct atmel_uart_port *port; 928 int ret; 929 930 port = &atmel_ports[pdev->id]; 931 atmel_init_port(port, pdev); 932 933 ret = uart_add_one_port(&atmel_uart, &port->uart); 934 if (!ret) { 935 device_init_wakeup(&pdev->dev, 1); 936 platform_set_drvdata(pdev, port); 937 } 938 939 return ret; 940} 941 942static int __devexit atmel_serial_remove(struct platform_device *pdev) 943{ 944 struct uart_port *port = platform_get_drvdata(pdev); 945 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 946 int ret = 0; 947 948 clk_disable(atmel_port->clk); 949 clk_put(atmel_port->clk); 950 951 device_init_wakeup(&pdev->dev, 0); 952 platform_set_drvdata(pdev, NULL); 953 954 if (port) { 955 ret = uart_remove_one_port(&atmel_uart, port); 956 kfree(port); 957 } 958 959 return ret; 960} 961 962static struct platform_driver atmel_serial_driver = { 963 .probe = atmel_serial_probe, 964 .remove = __devexit_p(atmel_serial_remove), 965 .suspend = atmel_serial_suspend, 966 .resume = atmel_serial_resume, 967 .driver = { 968 .name = "atmel_usart", 969 .owner = THIS_MODULE, 970 }, 971}; 972 973static int __init atmel_serial_init(void) 974{ 975 int ret; 976 977 ret = uart_register_driver(&atmel_uart); 978 if (ret) 979 return ret; 980 981 ret = platform_driver_register(&atmel_serial_driver); 982 if (ret) 983 uart_unregister_driver(&atmel_uart); 984 985 return ret; 986} 987 988static void __exit atmel_serial_exit(void) 989{ 990 platform_driver_unregister(&atmel_serial_driver); 991 uart_unregister_driver(&atmel_uart); 992} 993 994module_init(atmel_serial_init); 995module_exit(atmel_serial_exit); 996 997MODULE_AUTHOR("Rick Bronson"); 998MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver"); 999MODULE_LICENSE("GPL"); 1000