/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/sound/soc/s3c24xx/ |
H A D | s3c24xx_uda134x.c | 46 static struct clk *xtal; variable in typeref:struct:clk 76 xtal = clk_get(&s3c24xx_uda134x_snd_device->dev, "xtal"); 77 if (!xtal) { 78 printk(KERN_ERR "%s cannot get xtal\n", __func__); 86 clk_put(xtal); 96 rates[i*33] = clk_get_rate(xtal) / fs; 124 clk_put(xtal); 125 xtal = NULL;
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2440/ |
H A D | s3c2440-pll-12000000.c | 57 unsigned long xtal; local 59 xtal_clk = clk_get(NULL, "xtal"); 63 xtal = clk_get_rate(xtal_clk); 66 if (xtal == 12000000) {
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H A D | s3c2440-pll-16934400.c | 85 unsigned long xtal; local 87 xtal_clk = clk_get(NULL, "xtal"); 91 xtal = clk_get_rate(xtal_clk); 94 if (xtal == 169344000) {
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H A D | s3c2440-cpufreq.c | 37 static struct clk *xtal; variable in typeref:struct:clk 275 xtal = s3c_cpufreq_clk_get(NULL, "xtal"); 280 if (IS_ERR(xtal) || IS_ERR(hclk) || IS_ERR(fclk) || IS_ERR(armclk)) {
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pc100/ |
H A D | cpu.c | 105 void __init s5pc100_init_clocks(int xtal) argument 109 s3c24xx_register_baseclocks(xtal); 110 s5p_register_clocks(xtal);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pv210/ |
H A D | cpu.c | 118 void __init s5pv210_init_clocks(int xtal) argument 122 s3c24xx_register_baseclocks(xtal); 123 s5p_register_clocks(xtal);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/media/dvb/frontends/ |
H A D | stv0900.h | 40 u32 xtal; member in struct:stv0900_config
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H A D | tda1002x.h | 48 u32 xtal; /* defaults: 28920000 */ member in struct:tda10023_config
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H A D | stv090x.h | 73 u32 xtal; /* default: 8000000 */ member in struct:stv090x_config
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H A D | mt312.c | 47 unsigned long xtal; member in struct:mt312_state 213 (((state->xtal * 8192) / (sym_rat_op + 8192)) * 296 buf[0] = mt312_div(state->xtal * state->freq_mult * 2, 1000000); 299 buf[1] = mt312_div(state->xtal, 22000 * 4); 805 state->xtal = MT312_PLL_CLK; 810 state->xtal = MT312_PLL_CLK; 815 state->xtal = MT312_PLL_CLK_10_111;
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H A D | tda10023.c | 53 u32 xtal; member in struct:tda10023_state 504 if (state->config->xtal) { 505 state->xtal = state->config->xtal; 511 state->xtal = 28920000; 518 state->sysclk = (state->xtal * state->pll_m / \ 524 dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n", 525 __func__, state->xtal, state->pll_m, state->pll_p,
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c64xx/ |
H A D | s3c6410.c | 65 void __init s3c6410_init_clocks(int xtal) argument 68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
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H A D | clock.c | 741 unsigned long xtal; local 757 xtal_clk = clk_get(NULL, "xtal"); 760 xtal = clk_get_rate(xtal_clk); 763 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); 768 epll = s3c6400_get_epll(xtal); 769 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); 770 apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); 823 * @xtal: The rate for the clock crystal feeding the PLLs. 834 void __init s3c64xx_register_clocks(unsigned long xtal, argument [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/ |
H A D | s3c2410-clock.c | 216 struct clk *xtal; local 257 xtal = clk_get(NULL, "xtal"); 260 print_mhz(clk_get_rate(xtal) /
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H A D | s3c2443-clock.c | 388 unsigned long xtal; local 395 xtal_clk = clk_get(NULL, "xtal"); 396 xtal = clk_get_rate(xtal_clk); 399 pll = get_mpll(mpllcon, xtal); 446 void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, argument 458 s3c24xx_register_baseclocks(xtal);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5p6442/ |
H A D | clock.c | 275 unsigned long xtal; local 289 xtal = clk_get_rate(&clk_xtal); 291 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); 293 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); 294 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); 295 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/boards/mach-x3proto/ |
H A D | setup.c | 66 .xtal = R8A66597_PLATDATA_XTAL_12MHZ, 95 .xtal = M66592_PLATDATA_XTAL_24MHZ,
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-samsung/include/plat/ |
H A D | clock.h | 97 extern int s3c24xx_register_baseclocks(unsigned long xtal);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/media/video/ |
H A D | mt9v011.c | 81 unsigned xtal; member in struct:mt9v011 197 frames_per_ms = core->xtal * 1000l; 229 t_time = core->xtal * ((u64)numerator); 476 unsigned *xtal = data; local 480 if (xtal) { 481 core->xtal = *xtal; 482 v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n", 483 *xtal / 1000000, (*xtal / 100 [all...] |
H A D | saa6588.c | 42 static unsigned int xtal; variable 49 module_param(xtal, int, 0); 50 MODULE_PARM_DESC(xtal, "select oscillator frequency (0..3), default 0"); 366 switch (xtal) {
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pv310/ |
H A D | clock.c | 491 unsigned long xtal; local 506 xtal_clk = clk_get(NULL, "xtal"); 509 xtal = clk_get_rate(xtal_clk); 512 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); 514 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508); 515 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508); 516 epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0),
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2412/ |
H A D | cpu-freq.c | 36 static struct clk *xtal; variable in typeref:struct:clk 229 xtal = clk_get(NULL, "xtal"); 230 if (IS_ERR(xtal)) { 231 printk(KERN_ERR "%s: cannot find xtal clock\n", __func__);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2443/ |
H A D | clock.c | 339 void __init s3c2443_init_clocks(int xtal) argument 344 clk_epll.rate = s3c2443_get_epll(epllcon, xtal); 347 s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, s3c2443_fclk_div);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/boards/mach-highlander/ |
H A D | setup.c | 37 .xtal = R8A66597_PLATDATA_XTAL_12MHZ, 67 .xtal = M66592_PLATDATA_XTAL_24MHZ,
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/netgear-R7000-V1.0.7.12_1.2.5/src/shared/ |
H A D | hndpmu.c | 72 static void si_pmu0_pllinit0(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal); 73 static void si_pmu1_pllinit0(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal); 74 static void si_pmu1_pllinit1(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal); 75 static void si_pmu2_pllinit0(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal); 85 bool si_pmu_update_pllcontrol(si_t *sih, osl_t *osh, uint32 xtal, bool update_required); 349 "Invalid/Unsupported xtal value %d"; 3207 BCMATTACHFN(si_pmu0_pllinit0)(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal) argument 3214 if (xt->freq == xtal) 3219 PMU_MSG(("XTAL %d.%d MHz (%d)\n", xtal / 1000, xtal 4131 si_pmu_pllctrlreg_update(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal, uint8 spur_mode, const pllctrl_data_t *pllctrlreg_update, uint32 array_size, const uint32 *pllctrlreg_val) argument 4170 si_pmu_set_4345_pllcontrol_regs(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal) argument 4295 si_pmu_update_pllcontrol(si_t *sih, osl_t *osh, uint32 xtal, bool update_required) argument 4987 si_pmu2_pllinit0(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal) argument 5148 si_pmu1_pllinit1(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal) argument 5208 si_pmu1_pllinit0(si_t *sih, osl_t *osh, chipcregs_t *cc, uint32 xtal) argument [all...] |