Searched refs:vmid (Results 101 - 125 of 126) sorted by relevance

123456

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vm.c1048 if (job->vmid == 0)
1050 id = &id_mgr->ids[job->vmid];
1083 struct amdgpu_vmid *id = &id_mgr->ids[job->vmid];
1125 trace_amdgpu_vm_flush(ring, job->vmid, job->vm_pd_addr);
1126 amdgpu_ring_emit_vm_flush(ring, job->vmid, job->vm_pd_addr);
1130 amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid);
1163 amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,
3261 /* We only have requirement to reserve vmid from gfxhub */
H A Damdgpu_navi10_ih.c276 entry->vmid = (dw[0] >> 24) & 0xf;
H A Damdgpu_sdma_v3_0.c435 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local
441 SDMA_PKT_INDIRECT_HEADER_VMID(vmid & 0xf));
1076 unsigned vmid, uint64_t pd_addr)
1078 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
1075 sdma_v3_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Damdgpu_nv.c143 u32 me, u32 pipe, u32 queue, u32 vmid)
148 grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid);
142 nv_grbm_select(struct amdgpu_device *adev, u32 me, u32 pipe, u32 queue, u32 vmid) argument
H A Damdgpu_vega10_ih.c462 entry->vmid = (dw[0] >> 24) & 0xf;
H A Damdgpu_sdma_v4_0.c805 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local
811 SDMA_PKT_INDIRECT_HEADER_VMID(vmid & 0xf));
1731 unsigned vmid, uint64_t pd_addr)
1733 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
1730 sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Damdgpu_soc15.c292 u32 me, u32 pipe, u32 queue, u32 vmid)
297 grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid);
291 soc15_grbm_select(struct amdgpu_device *adev, u32 me, u32 pipe, u32 queue, u32 vmid) argument
H A Damdgpu_vi.c360 * @vmid: VMID
367 u32 me, u32 pipe, u32 queue, u32 vmid)
372 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, VMID, vmid);
366 vi_srbm_select(struct amdgpu_device *adev, u32 me, u32 pipe, u32 queue, u32 vmid) argument
H A Damdgpu_gfx_v6_0.c1872 unsigned vmid = AMDGPU_JOB_GET_VMID(job); local
1886 control |= ib->length_dw | (vmid << 24);
2337 unsigned vmid, uint64_t pd_addr)
2341 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
2336 gfx_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument
H A Dsid.h1925 #define DMA_IB_PACKET(cmd, vmid, n) ((((cmd) & 0xF) << 28) | \
1926 (((vmid) & 0xF) << 20) | \
H A Damdgpu_cik.c869 * @vmid: VMID
876 u32 me, u32 pipe, u32 queue, u32 vmid)
881 ((vmid << SRBM_GFX_CNTL__VMID__SHIFT) & SRBM_GFX_CNTL__VMID_MASK)|
875 cik_srbm_select(struct amdgpu_device *adev, u32 me, u32 pipe, u32 queue, u32 vmid) argument
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
H A Dkfd_process.c1166 if (pdd->qpd.vmid)
1168 pdd->qpd.vmid);
H A Dkfd_process_queue_manager.c181 q_properties->vmid = 0;
H A Dkfd_chardev.c1152 pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va)
1154 dev->kgd, args->va_addr, pdd->qpd.vmid);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Ddc.h590 void dc_setup_vm_context(struct dc *dc, struct dc_virtual_addr_space_config *va_config, int vmid);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_hwseq.c1877 int vmid)
1881 if (vmid == 0) {
1892 dc->res_pool->hubbub->funcs->init_vm_ctx(dc->res_pool->hubbub, &config, vmid);
1951 vm_helper_mark_vmid_used(dc->vm_helper, plane_state->address.vmid, pipe_ctx->plane_res.hubp->inst);
1873 dcn20_init_vm_ctx( struct dce_hwseq *hws, struct dc *dc, struct dc_virtual_addr_space_config *va_config, int vmid) argument
H A Damdgpu_dcn20_resource.c1112 struct dcn20_vmid *vmid = &hubbub->vmid[i]; local
1114 vmid->ctx = ctx;
1116 vmid->regs = &vmid_regs[i];
1117 vmid->shifts = &vmid_shifts;
1118 vmid->masks = &vmid_masks;
H A Damdgpu_dcn20_hubp.c695 VMID, address->vmid);
/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dnid.h1344 #define DMA_IB_PACKET(cmd, vmid, n) ((((cmd) & 0xF) << 28) | \
1345 (((vmid) & 0xF) << 20) | \
H A Dsid.h1861 #define DMA_IB_PACKET(cmd, vmid, n) ((((cmd) & 0xF) << 28) | \
1862 (((vmid) & 0xF) << 20) | \
H A Dradeon_ni.c1417 /* flush read cache over gart for this vmid */
1460 /* flush read cache over gart for this vmid */
2544 u32 vmid = (status & FAULT_VMID_MASK) >> FAULT_VMID_SHIFT; local
2686 printk("VM fault (0x%02x, vmid %d) at page %u, %s from %s (%d)\n",
2687 protections, vmid, addr,
H A Dradeon_cik.c1861 * @vmid: VMID
1868 u32 me, u32 pipe, u32 queue, u32 vmid)
1872 VMID(vmid & 0xf) |
4088 /* set the RB to use vmid 0 */
4511 u32 vmid; member in struct:bonaire_mqd
4672 /* set MQD vmid to 0 */
4749 /* set the vmid for the queue */
5681 u32 vmid = (status & FAULT_VMID_MASK) >> FAULT_VMID_SHIFT; local
5691 printk("VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)\n",
5692 protections, vmid, add
1867 cik_srbm_select(struct radeon_device *rdev, u32 me, u32 pipe, u32 queue, u32 vmid) argument
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
H A Damdgpu_dcn21_hubbub.c141 dcn20_vmid_setup(&hubbub1->vmid[0], &phys_config);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Damdgpu_dcn10_hw_sequencer.c2712 unsigned int vmid, unsigned int vmid_frame_number)
2723 params.vertical_total_mid = vmid;
2710 dcn10_set_drr(struct pipe_ctx **pipe_ctx, int num_pipes, unsigned int vmin, unsigned int vmax, unsigned int vmid, unsigned int vmid_frame_number) argument
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_hw_sequencer.c1712 unsigned int vmid, unsigned int vmid_frame_number)
1710 set_drr(struct pipe_ctx **pipe_ctx, int num_pipes, unsigned int vmin, unsigned int vmax, unsigned int vmid, unsigned int vmid_frame_number) argument

Completed in 551 milliseconds

123456