/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
H A D | amdgpu_dc_link_dp.c | 2216 const struct dc_crtc_timing *timing) 2224 if ((timing->pix_clk_100hz / 10) == (uint32_t) 25175 && 2225 timing->h_addressable == (uint32_t) 640 && 2226 timing->v_addressable == (uint32_t) 480) 2237 req_bw = dc_bandwidth_in_kbps_from_timing(timing); 2269 * 2. could support the b/w requested by the timing 2320 * 2. could support the b/w requested by the timing 2357 req_bw = dc_bandwidth_in_kbps_from_timing(&stream->timing); 3632 stream->timing.display_color_depth; 3635 int width = pipe_ctx->stream->timing 2214 dp_validate_mode_timing( struct dc_link *link, const struct dc_crtc_timing *timing) argument [all...] |
/netbsd-current/sys/dev/pcmcia/ |
H A D | pcmcia_cis.c | 1051 u_int power, timing, iospace, irq, memspace, misc; local 1152 timing = reg & PCMCIA_TPCE_FS_TIMING; 1183 if (timing) { 1184 /* skip over timing, don't save */
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
H A D | dcn10_optc.h | 549 const struct dc_crtc_timing *timing); 634 const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags); 663 bool optc1_is_two_pixels_per_containter(const struct dc_crtc_timing *timing);
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H A D | amdgpu_dcn10_stream_encoder.c | 275 /*the input timing is in VESA spec format with Interlace flag =1*/ 437 /* calculate from vesa timing parameters 921 /* Tell the DP encoder to ignore timing from CRTC, must be done after 944 if (param->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) { 952 m_vid_l *= param->timing.pix_clk_100hz / 10;
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/netbsd-current/sys/dev/sdmmc/ |
H A D | sdmmc_mem.c | 302 * Switch to SDR12 timing 761 int timing = -1; local 769 timing = SDMMC_TIMING_UHS_SDR50; 772 timing = SDMMC_TIMING_UHS_SDR104; 780 timing = SDMMC_TIMING_MMC_HS200; 787 DPRINTF(("%s: execute tuning for timing %d\n", SDMMCDEVNAME(sc), 788 timing)); 790 return sdmmc_chip_execute_tuning(sc->sc_sct, sc->sc_sch, timing); 1030 "card failed to switch to timing mode %d, using %d\n",
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H A D | sdhc.c | 1449 sdhc_execute_tuning1(struct sdhc_host *hp, int timing) argument 1457 hp->tuning_timing = timing; 1459 switch (timing) { 1543 sdhc_execute_tuning(sdmmc_chipset_handle_t sch, int timing) argument 1549 error = sdhc_execute_tuning1(hp, timing);
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/netbsd-current/sys/dev/ |
H A D | sequencer.c | 1056 DPRINTFN(4, ("seq_do_command: %p cmd=0x%02x\n", sc, b->timing.op)); 1242 switch(b->timing.op) { 1289 DPRINTF(("%s: unimplemented %02x\n", __func__, b->timing.op)); 1293 DPRINTF(("%s: unknown %02x\n", __func__, b->timing.op));
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/netbsd-current/external/lgpl3/gmp/dist/mpn/powerpc64/mode64/p9/ |
H A D | addmul_2.asm | 40 C * The 4x unrolling was not motivated by any timing tests.
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H A D | mul_2.asm | 40 C * The 4x unrolling was not motivated by any timing tests.
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/netbsd-current/sys/arch/arm/amlogic/ |
H A D | mesongx_mmc.c | 822 mesongx_mmc_execute_tuning(sdmmc_chipset_handle_t sch, int timing) argument 824 switch (timing) {
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H A D | meson_sdhc.c | 864 meson_sdhc_execute_tuning(sdmmc_chipset_handle_t sch, int timing) argument 909 switch (timing) {
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/netbsd-current/external/gpl3/gdb.old/dist/sim/lm32/ |
H A D | decode.c | 135 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 138 SIM_ASSERT (t->index == id->timing->num);
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/netbsd-current/external/gpl3/gdb/dist/sim/lm32/ |
H A D | decode.c | 135 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 138 SIM_ASSERT (t->index == id->timing->num);
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/netbsd-current/external/gpl3/gcc.old/dist/libphobos/src/std/net/ |
H A D | curl.d | 2963 * timing = one of the timings defined in $(REF CurlInfo, etc, c, curl). 2972 * val = the actual value of the inquired timing. 2993 CurlCode getTiming(CurlInfo timing, ref double val) 2995 return p.curl.getTiming(timing, val); 3676 * timing = one of the timings defined in $(REF CurlInfo, etc, c, curl). 3685 * val = the actual value of the inquired timing. 3708 CurlCode getTiming(CurlInfo timing, ref double val) 3710 return p.curl.getTiming(timing, val); 4507 The timed category is passed through the timing parameter while the timing [all...] |
/netbsd-current/external/gpl3/gcc/dist/libphobos/src/std/net/ |
H A D | curl.d | 2938 * timing = one of the timings defined in $(REF CurlInfo, etc, c, curl). 2947 * val = the actual value of the inquired timing. 2968 CurlCode getTiming(CurlInfo timing, ref double val) 2970 return p.curl.getTiming(timing, val); 3657 * timing = one of the timings defined in $(REF CurlInfo, etc, c, curl). 3666 * val = the actual value of the inquired timing. 3689 CurlCode getTiming(CurlInfo timing, ref double val) 3691 return p.curl.getTiming(timing, val); 4527 The timed category is passed through the timing parameter while the timing [all...] |
/netbsd-current/sys/sys/ |
H A D | midiio.h | 436 struct { _TIMING_HDR; } timing; member in union:__anon13187
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/netbsd-current/external/gpl3/gcc.old/dist/libphobos/src/std/datetime/ |
H A D | stopwatch.d | 4 Module containing some basic benchmarking and timing functionality. 45 $(REF SysTime,std,datetime,systime) should not be used for timing).
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/netbsd-current/external/gpl3/gdb.old/dist/sim/bpf/ |
H A D | decode-be.c | 197 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 200 SIM_ASSERT (t->index == id->timing->num);
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H A D | decode-le.c | 197 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 200 SIM_ASSERT (t->index == id->timing->num);
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/netbsd-current/external/gpl3/gcc/dist/libphobos/src/std/datetime/ |
H A D | stopwatch.d | 4 Module containing some basic benchmarking and timing functionality. 74 $(REF SysTime,std,datetime,systime) should not be used for timing).
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/netbsd-current/external/gpl3/gdb/dist/sim/bpf/ |
H A D | decode-be.c | 199 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 202 SIM_ASSERT (t->index == id->timing->num);
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H A D | decode-le.c | 199 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 202 SIM_ASSERT (t->index == id->timing->num);
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
H A D | amdgpu_dce_calcs.c | 1460 /*aligned displays with the same timing.*/ 2801 data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total); 2802 data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total); 2803 data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_100hz, 10000); 2899 data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total); 2900 data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total); 2901 pixel_clock_100hz = pipe[i].stream->timing.pix_clk_100hz; 2902 if (pipe[i].stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING) 2967 data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_addressable); 2969 data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Support/Unix/ |
H A D | Path.inc | 495 // Call mntctl; try more than twice in case of timing issues with a concurrent
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/netbsd-current/external/gpl3/gdb.old/dist/sim/iq2000/ |
H A D | decode.c | 217 id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; 220 SIM_ASSERT (t->index == id->timing->num);
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