Searched refs:op3 (Results 126 - 144 of 144) sorted by relevance

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/netbsd-current/external/gpl3/gdb/dist/gdb/
H A Darm-tdep.c13776 uint32_t op1, op2, op3;
13782 op3 = bits (thumb2_insn_r->arm_insn, 4, 7);
13786 if(!(1 == op1 && 1 == op2 && (0 == op3 || 1 == op3)))
13794 if (3 == op2 || (op1 & 2) || (1 == op1 && 1 == op2 && 7 == op3))
13826 if (4 == op3)
13832 else if (5 == op3)
13838 else if (7 == op3)
13774 uint32_t op1, op2, op3; local
/netbsd-current/external/gpl3/gcc/dist/gcc/
H A Dtree.cc4348 tree op0, op1, op2, op3;
4451 op3 = SUBSTITUTE_IN_EXPR (TREE_OPERAND (exp, 3), f, r);
4455 && op3 == TREE_OPERAND (exp, 3))
4459 = fold (build4 (code, TREE_TYPE (exp), op0, op1, op2, op3));
4540 tree op0, op1, op2, op3;
4647 op3 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (TREE_OPERAND (exp, 3), obj);
4651 && op3 == TREE_OPERAND (exp, 3))
4655 = fold (build4 (code, TREE_TYPE (exp), op0, op1, op2, op3));
4334 tree op0, op1, op2, op3; local
4526 tree op0, op1, op2, op3; local
H A Dtree-vect-stmts.cc1525 tree op3, vec<tree> *vec_oprnds3, tree vectype3)
1535 if (op3)
1549 if (op3)
1551 op3, vec_oprnds3, vectype3);
1561 tree op3, vec<tree> *vec_oprnds3)
1567 op3, vec_oprnds3, NULL_TREE);
1520 vect_get_vec_defs(vec_info *vinfo, stmt_vec_info stmt_info, slp_tree slp_node, unsigned ncopies, tree op0, vec<tree> *vec_oprnds0, tree vectype0, tree op1, vec<tree> *vec_oprnds1, tree vectype1, tree op2, vec<tree> *vec_oprnds2, tree vectype2, tree op3, vec<tree> *vec_oprnds3, tree vectype3) argument
1556 vect_get_vec_defs(vec_info *vinfo, stmt_vec_info stmt_info, slp_tree slp_node, unsigned ncopies, tree op0, vec<tree> *vec_oprnds0, tree op1, vec<tree> *vec_oprnds1, tree op2, vec<tree> *vec_oprnds2, tree op3, vec<tree> *vec_oprnds3) argument
H A Dsimplify-rtx.cc8214 rtx op3 = make_test_reg (mode);
8220 rtx vm2 = gen_rtx_VEC_MERGE (mode, op2, op3, mask1);
8248 ASSERT_RTX_EQ (gen_rtx_PLUS (mode, op1, op3),
8255 ASSERT_RTX_EQ (gen_rtx_FMA (mode, op1, op3, op5),
8265 ASSERT_RTX_EQ (gen_rtx_VEC_MERGE (mode, op0, op3, mask1),
/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/rs6000/
H A Drs6000.h2419 signed char op3;
2404 signed char op3; member in struct:altivec_builtin_types
H A Drs6000.c6601 rtx op3 = force_reg (SFmode, XVECEXP (vals, 0, 3));
6607 emit_insn (gen_vsx_concat_v2sf (dbl_odd, op1, op3));
6618 emit_insn (gen_vsx_concat_v2sf (dbl_odd, op2, op3));
6589 rtx op3 = force_reg (SFmode, XVECEXP (vals, 0, 3)); local
/netbsd-current/external/gpl3/gcc.old/dist/gcc/
H A Dsimplify-rtx.c7463 rtx op3 = make_test_reg (mode);
7469 rtx vm2 = gen_rtx_VEC_MERGE (mode, op2, op3, mask1);
7497 ASSERT_RTX_EQ (gen_rtx_PLUS (mode, op1, op3),
7504 ASSERT_RTX_EQ (gen_rtx_FMA (mode, op1, op3, op5),
7514 ASSERT_RTX_EQ (gen_rtx_VEC_MERGE (mode, op0, op3, mask1),
7452 rtx op3 = make_test_reg (mode); local
H A Dtree.c4114 tree op0, op1, op2, op3;
4217 op3 = SUBSTITUTE_IN_EXPR (TREE_OPERAND (exp, 3), f, r);
4221 && op3 == TREE_OPERAND (exp, 3))
4225 = fold (build4 (code, TREE_TYPE (exp), op0, op1, op2, op3));
4306 tree op0, op1, op2, op3;
4413 op3 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (TREE_OPERAND (exp, 3), obj);
4417 && op3 == TREE_OPERAND (exp, 3))
4421 = fold (build4 (code, TREE_TYPE (exp), op0, op1, op2, op3));
4099 tree op0, op1, op2, op3; local
4291 tree op0, op1, op2, op3; local
/netbsd-current/sys/external/bsd/sljit/dist/sljit_src/
H A DsljitNativeTILEGX_64.c746 static sljit_s32 push_4_buffer(struct sljit_compiler *compiler, tilegx_mnemonic opc, int op0, int op1, int op2, int op3, int line) argument
757 inst_buf[inst_buf_index].operand_value[3] = op3;
/netbsd-current/external/gpl3/gdb/dist/bfd/
H A Delfnn-loongarch.c1868 #define LARCH_RELOC_PERFORM_3OP(op1, op2, op3) \
1875 ret = loongarch_push (op3); \
/netbsd-current/external/gpl3/binutils.old/dist/bfd/
H A Delfnn-loongarch.c1565 #define LARCH_RELOC_PERFORM_3OP(op1, op2, op3) \
1572 ret = loongarch_push (op3); \
/netbsd-current/external/gpl3/binutils/dist/bfd/
H A Delfnn-loongarch.c2040 #define LARCH_RELOC_PERFORM_3OP(op1, op2, op3) \
2047 ret = loongarch_push (op3); \
/netbsd-current/external/gpl3/gdb.old/dist/gold/
H A Dx86_64.cc5669 unsigned char op3 = view[-1]; local
5670 unsigned char reg = op3 >> 3;
/netbsd-current/external/gpl3/binutils.old/dist/gold/
H A Dx86_64.cc5702 unsigned char op3 = view[-1]; local
5703 unsigned char reg = op3 >> 3;
/netbsd-current/external/gpl3/binutils/dist/gold/
H A Dx86_64.cc5317 unsigned char op3 = view[-1]; local
5318 unsigned char reg = op3 >> 3;
/netbsd-current/sys/arch/sparc/sparc/
H A Dlocore.s2085 ! instruction format: op=2, op3=0x3b (see also instr.h)
2086 set ((3 << 30) | (0x3f << 19)), %l7 ! extract op & op3 fields
/netbsd-current/external/gpl3/gdb.old/dist/sim/aarch64/
H A Dsimulator.c13697 instr[15,10] = op3 : must be 000000
13702 uint32_t op3 = INSTR (15, 10); local
13707 if (op2 != 0x1F || op3 != 0 || op4 != 0)
/netbsd-current/external/gpl3/gdb/dist/sim/aarch64/
H A Dsimulator.c13685 instr[15,10] = op3 : must be 000000
13690 uint32_t op3 = INSTR (15, 10); local
13695 if (op2 != 0x1F || op3 != 0 || op4 != 0)
/netbsd-current/external/gpl3/gcc/dist/gcc/config/rs6000/
H A Drs6000.cc6889 rtx op3 = force_reg (SFmode, XVECEXP (vals, 0, 3));
6892 emit_insn (gen_vsx_concat_v2sf (dbl_odd, op2, op3));
6877 rtx op3 = force_reg (SFmode, XVECEXP (vals, 0, 3)); local

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