/netbsd-current/external/apache2/llvm/dist/clang/lib/Lex/ |
H A D | Lexer.cpp | 1745 char C1 = Lexer::getCharAndSizeNoWarn(Start, Size, LangOpts); local 1746 if (C1 != '0')
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
H A D | SimplifyCFG.cpp | 784 /// Return true if there are any keys in C1 that exist in C2 as well. 785 static bool ValuesOverlap(std::vector<ValueEqualityComparisonCase> &C1, argument 787 std::vector<ValueEqualityComparisonCase> *V1 = &C1, *V2 = &C2; 1464 auto *C1 = dyn_cast<CallInst>(I1); 1466 if (C1 && C2) 1467 if (C1->isMustTailCall() != C2->isMustTailCall())
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 4545 // If we have (x & C1), and C1 is an appropriate mask, we can transform it 4557 // 2. C1 is 255 or 65535, so we can use uxtb or uxth. 12028 ConstantSDNode *C1 = dyn_cast<ConstantSDNode>(ExtVec1->getOperand(1)); local 12031 if (!C0 || !C1 || C0->getZExtValue() != nextIndex 12032 || C1->getZExtValue() != nextIndex+1) 13274 uint32_t C1 = (uint32_t)N1C->getZExtValue(); 13276 if (C1 == 255 || C1 == 65535) 13298 C1 [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterBankInfo.cpp | 1694 unsigned C1 = 0; local 1710 C1 = ImmOffset; 1724 return {BaseReg, C1};
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H A D | AMDGPUISelLowering.cpp | 1884 SDValue C1 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, MinusOne, Zero, local 1888 SDValue C3 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, C2, C1, ISD::SETEQ); 2208 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64); local 2209 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 188 Sparc::C0, Sparc::C1, Sparc::C2, Sparc::C3,
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Analysis/ |
H A D | ScalarEvolution.cpp | 1802 // (zext (add (shl X, C1), C2)), for instance, (zext (5 + (4 * X))). 2892 // C1*(C2+V) -> C1*C2 + C1*V 3274 static const APInt gcd(const SCEVConstant *C1, const SCEVConstant *C2) { 3275 APInt A = C1->getAPInt().abs(); 7962 // particular, only affine AddRec's like {C1,+,C2}<L>. 9071 ConstantInt *C1 = ConstantInt::get(SE.getContext(), X-1); 9072 ConstantInt *V1 = EvaluateConstantChrecAtConstant(AddRec, C1, SE); 10548 const SCEVConstant *C1 [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 2249 SDValue C0 = Cond.getOperand(0), C1 = Cond.getOperand(1); 2250 if (C1->getOpcode() == HexagonISD::QTRUE)
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H A D | HexagonISelLowering.cpp | 3261 SDValue C0 = Cond.getOperand(0), C1 = Cond.getOperand(1); 3262 if (C1->getOpcode() == HexagonISD::PTRUE) {
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 1788 // %root = SHIFT %t2, G_CONSTANT C1 1790 // %t3 = SHIFT %X, G_CONSTANT (C0+C1) 1791 // %t4 = SHIFT %Y, G_CONSTANT C1 1813 const Register C1 = MI.getOperand(2).getReg(); 1814 auto MaybeImmVal = getConstantVRegValWithLookThrough(C1, MRI);
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/netbsd-current/external/gpl3/binutils/dist/gas/config/ |
H A D | tc-m68hc11.c | 57 #define IS_OPCODE(C1,C2) (((C1) & 0x0FF) == ((C2) & 0x0FF))
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/netbsd-current/external/gpl3/binutils.old/dist/gas/config/ |
H A D | tc-m68hc11.c | 57 #define IS_OPCODE(C1,C2) (((C1) & 0x0FF) == ((C2) & 0x0FF))
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/netbsd-current/external/gpl3/gdb.old/dist/gas/config/ |
H A D | tc-m68hc11.c | 57 #define IS_OPCODE(C1,C2) (((C1) & 0x0FF) == ((C2) & 0x0FF))
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2258 auto *C1 = dyn_cast<ConstantFPSDNode>(C.Op1); 2259 if (C1 && C1->isZero()) { 2283 auto *C1 = dyn_cast<ConstantSDNode>(C.Op0.getOperand(1)); local 2284 if (C1 && C1->getZExtValue() == 32) { 5866 // Convert (zext (select_ccmask C1, C2)) into (select_ccmask C1', C2') 5914 // Convert (sext (ashr (shl X, C1), C2)) to 5915 // (ashr (shl (anyext X), C1'), C [all...] |
/netbsd-current/external/apache2/llvm/dist/clang/lib/Sema/ |
H A D | SemaOverload.cpp | 9019 // For every quintuple (C1, C2, T, CV1, CV2), where C2 is a class type, 9020 // C1 is the same type as C2 or is a derived class of C2, T is an object 9024 // CV12 T& operator->*(CV1 C1*, CV2 T C2::*); 9030 QualType C1; 9032 C1 = QualType(Q1.strip(C1Ty->getPointeeType()), 0); 9033 if (!isa<RecordType>(C1)) 9046 if (C1 != C2 && !S.IsDerivedFrom(CandidateSet.getLocation(), C1, C2))
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 20133 Constant *C1 = ConstantVector::get(CV1); 20134 SDValue CPIdx1 = DAG.getConstantPool(C1, PtrVT, Align(16)); 23103 ConstantSDNode *C1 = isConstOrConstSplat(Op1); 23104 if (C1 && C1->getAPIntValue().isPowerOf2()) { 23106 unsigned ShiftAmt = BitWidth - C1->getAPIntValue().logBase2() - 1; [all...] |
/netbsd-current/external/gpl3/gcc.old/dist/libphobos/src/std/ |
H A D | typecons.d | 6939 static class C1 { byte b; } 6944 static assert(scoped!C1().sizeof % alignment == 0);
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/netbsd-current/external/gpl3/gcc/dist/libphobos/src/std/ |
H A D | typecons.d | 8422 static class C1 { byte b; } 8427 static assert(scoped!C1().sizeof % alignment == 0);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/ |
H A D | SLPVectorizer.cpp | 993 auto *C1 = dyn_cast<Constant>(V1); local 995 if (C1 && C2)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5112 // (and (shl x, C2), (C1 << C2)) 5113 // (and (srl x, C2), C1) 5114 // (shl (and x, C1), C2) 5115 // (srl (and x, (C1 << C2)), C2) 5116 // Where C2 is a power of 2 and C1 has at least that many leading zeroes. 5118 // BitmanipMasks[log2(C2)] specifies the expected C1 value. 5389 // Combine (GREVI (GREVI x, C2), C1) -> (GREVI x, C1^C2) when C1^C2 is 5391 // Combine (GORCI (GORCI x, C2), C1) 5938 auto *C1 = dyn_cast<ConstantSDNode>(N0->getOperand(1)); local [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 9520 // BUILD_VECTORs with constant element C1, C2 is a constant, and: 9521 // - for the SLI case: C1 == ~(Ones(ElemSizeInBits) << C2) 9522 // - for the SRI case: C1 == ~(Ones(ElemSizeInBits) >> C2) 9564 uint64_t C1; 9567 if (!isAllConstantBuildVector(And.getOperand(1), C1)) 9574 C1 = ~(C1nodeImm->getZExtValue() << C1nodeShift->getZExtValue()); 9577 // Is C1 == ~(Ones(ElemSizeInBits) << C2) or 9578 // C1 == ~(Ones(ElemSizeInBits) >> C2), taking into account 9585 APInt C1AsAPInt(ElemSizeInBits, C1); 9611 // Attempt to form a vector S[LR]I from (or (and X, C1), (ls [all...] |
/netbsd-current/external/apache2/llvm/dist/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 7362 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 7364 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); 7545 Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); 7547 Value *Arg1b = Builder.CreateLShr(Arg1, C1);
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/netbsd-current/sys/arch/m68k/060sp/dist/ |
H A D | fplsp.s | 6420 #--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X' 6422 #--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y. 6450 fadd.d ATANC1(%pc),%fp1 # C1+Z*(C3+Z*C5) 6453 fadd.x %fp2,%fp1 # [Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]
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H A D | fpsp.s | 6526 #--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X' 6528 #--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y. 6556 fadd.d ATANC1(%pc),%fp1 # C1+Z*(C3+Z*C5) 6559 fadd.x %fp2,%fp1 # [Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]
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/netbsd-current/external/bsd/am-utils/dist/doc/ |
H A D | texinfo.tex | 9276 \DeclareUnicodeCharacter{00C1}{\'A}
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