Searched refs:csr (Results 201 - 225 of 237) sorted by relevance

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/netbsd-current/sys/dev/pci/
H A Dneo.c557 pcireg_t csr; local
618 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
620 csr | PCI_COMMAND_MASTER_ENABLE);
H A Dif_jme.c256 pcireg_t csr; local
327 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
329 csr | PCI_COMMAND_MASTER_ENABLE);
335 csr = bus_space_read_4(sc->jme_bt_misc, sc->jme_bh_misc, JME_CHIPMODE);
336 if (((csr & CHIPMODE_FPGA_REV_MASK) >> CHIPMODE_FPGA_REV_SHIFT) !=
339 sc->jme_chip_rev = (csr & CHIPMODE_REV_MASK) >> CHIPMODE_REV_SHIFT;
344 (csr & CHIPMODE_FPGA_REV_MASK) >> CHIPMODE_FPGA_REV_SHIFT);
H A Dpccbb.c715 pcireg_t bcr, bhlc, cbctl, csr, lscp, mfunc, mrburst, slotctl, sockctl, local
722 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
724 csr |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
732 csr |= PCI_COMMAND_PARITY_ENABLE;
734 csr |= PCI_COMMAND_SERR_ENABLE;
735 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
H A Dsv.c329 pcireg_t csr; local
382 csr = pci_conf_read(pc, pt, PCI_COMMAND_STATUS_REG);
384 csr | PCI_COMMAND_MASTER_ENABLE);
H A Desm.c1507 pcireg_t csr, data; local
1525 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
1527 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
H A Dtwe.c315 pcireg_t csr; local
344 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
346 csr | PCI_COMMAND_MASTER_ENABLE);
H A Deap.c532 pcireg_t csr; local
599 csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
601 csr | PCI_COMMAND_MASTER_ENABLE);
H A Dif_tl.c290 pcireg_t csr; local
351 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
353 csr | PCI_COMMAND_MASTER_ENABLE);
H A Dif_vte.c168 pcireg_t reg, csr; local
203 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
205 csr | PCI_COMMAND_MASTER_ENABLE);
H A Dif_nfe.c219 pcireg_t memtype, csr; local
257 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
258 csr |= PCI_COMMAND_MASTER_ENABLE;
259 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
H A Dtwa.c1510 pcireg_t csr; local
1588 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
1591 csr | PCI_COMMAND_MASTER_ENABLE);
H A Dif_sip.c1072 pcireg_t csr; local
1182 csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
1184 csr |= PCI_COMMAND_INVALIDATE_ENABLE;
1186 csr | PCI_COMMAND_MASTER_ENABLE);
/netbsd-current/sys/arch/zaurus/zaurus/
H A Dmachdep.c577 uint16_t mcr, cdr, csr, cpr, ccr, irr, irm, imr, isr; local
582 csr = ioreg16_read(baseaddr + SCOOP_CSR);
593 if (mcr == 0 && cdr == 0 && csr == 0 && cpr == 0 && ccr == 0 &&
/netbsd-current/sys/arch/amiga/dev/
H A Dsiop2.c509 GET_SBIC_csr (rp, csr); /* clears interrupt also */
517 GET_SBIC_csr (rp, csr);
519 while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1)
520 && (csr != SBIC_CSR_CMD_INVALID));
H A Dsiop.c522 GET_SBIC_csr (rp, csr); /* clears interrupt also */
530 GET_SBIC_csr (rp, csr);
532 while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1)
533 && (csr != SBIC_CSR_CMD_INVALID));
/netbsd-current/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_gpu_error.c778 struct intel_csr *csr = &m->i915->csr; local
781 yesno(csr->dmc_payload != NULL));
783 CSR_VERSION_MAJOR(csr->version),
784 CSR_VERSION_MINOR(csr->version));
H A Di915_debugfs.c2283 struct intel_csr *csr; local
2289 csr = &dev_priv->csr;
2293 seq_printf(m, "fw loaded: %s\n", yesno(csr->dmc_payload != NULL));
2294 seq_printf(m, "path: %s\n", csr->fw_path);
2296 if (!csr->dmc_payload)
2299 seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
2300 CSR_VERSION_MINOR(csr->version));
/netbsd-current/sys/arch/sgimips/dev/
H A Dscn.c410 u_char acr, csr, mr1, mr2; local
479 csr = (dp->chan[chan].icode<<4) | dp->chan[chan].ocode;
480 if (sc->sc_chbase[CH_CSR] != csr) {
481 sc->sc_chbase[CH_CSR] = csr;
/netbsd-current/sys/dev/ic/
H A Dtulipreg.h413 #define TULIP_CSR_INDEX(csr) ((csr) >> 3)
H A Dtulip.c3080 uint32_t csr, ackmask = 0; local
3110 csr = TULIP_READ(sc, CSR_STATUS);
3111 if ((csr & ackmask) != ackmask) {
3112 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 &&
3113 (csr & STATUS_TS) != STATUS_TS_STOPPED) {
3124 tx_state_names[(csr & STATUS_TS) >> 20]);
3127 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 &&
3128 (csr & STATUS_RS) != STATUS_RS_STOPPED) {
3141 rx_state_names[(csr & STATUS_RS) >> 17]);
/netbsd-current/external/ibm-public/postfix/dist/conf/
H A Dpostfix-tls-script122 # .IP "\fBoutput-server-csr\fR [\fB-k \fIkeyfile\fR] [\fIhostname\fB...\fR]"
617 # postfix tls output-server-csr -k $2 [<hostname> ...]
1046 output-server-csr)
1150 $FATAL "usage: postfix tls enable-client (or enable-server, new-server-key, new-server-cert, deploy-server-cert, output-server-csr, output-server-tlsa, all-default-client, all-default-server)"
/netbsd-current/sys/arch/pmax/ibus/
H A Dsii.c310 regs->csr = SII_HPM;
348 regs->csr = SII_HPM | SII_RSE | SII_PCE | SII_IE;
/netbsd-current/sys/arch/vax/uba/
H A Dqvaux.c904 for(; (dz->csr & DZ_CSR_RX_DONE) == 0;);
/netbsd-current/sys/dev/pci/ixgbe/
H A Dixv.c1521 pcireg_t memtype, csr; local
1550 csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
1552 csr |= PCI_COMMAND_MEM_ENABLE;
1554 csr);
/netbsd-current/external/gpl3/gdb.old/dist/gas/config/
H A Dtc-riscv.c1714 int csr = (insn & (OP_MASK_CSR << OP_SH_CSR)) >> OP_SH_CSR; local
1716 int readonly = (((csr & (0x3 << 10)) >> 10) == 0x3);
2598 {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK},
3117 else if (strcmp (name, "csr-check") == 0)
3119 else if (strcmp (name, "no-csr-check") == 0)

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