Searched refs:x10 (Results 126 - 150 of 3017) sorted by relevance

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/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/testsuite/gcc.target/mips/
H A Dbranch-1.c10 NOMIPS16 void f3 (unsigned int x) { if (x & 0x10) bar (); }
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/testsuite/gcc.c-torture/execute/
H A D20030715-1.c17 const char *err = ap_check_cmd_context (a, 0x01|0x02|0x04|0x08|0x10);
H A D980612-1.c14 if (((f->a & 0x7f) & ~0x10) <= 2)
/netbsd-6-1-5-RELEASE/include/
H A Dfnmatch.h48 #define FNM_LEADING_DIR 0x10 /* Ignore /<tail> after Imatch. */
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/testsuite/gcc.dg/
H A Ddeclspec-3.c28 const static int x10; /* { dg-warning "not at beginning" } */ variable
/netbsd-6-1-5-RELEASE/sys/arch/sparc64/dev/
H A Dsab82532reg.h97 #define SAB_STAR_FCS 0x10 /* flow control status */
106 #define SAB_CMDR_STI 0x10 /* start timer */
113 #define SAB_MODE_FLON 0x10 /* flow control on */
126 #define SAB_DAFO_PAR1 0x10 /* parity 1, see below */
148 #define SAB_RFC_RFDF 0x10 /* rfifo data format: 0 data,1 data+stat */
167 #define SAB_XBCH_XC 0x10 /* transmit continuously */
173 #define SAB_CCR0_SC2 0x10 /* serial port config 2, see below */
193 #define SAB_CCR1_ODS 0x10 /* Output driver select:1:pushpull,0:odrain */
214 #define SAB_CCR2_SSEL 0x10 /* clock source select */
217 #define SAB_CCR2_RCS0 0x10 /* r
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/netbsd-6-1-5-RELEASE/sys/arch/sun2/sun2/
H A Denable.h39 #define ENA_PAR_CHECK 0x10 /* enable parity checking and errors */
/netbsd-6-1-5-RELEASE/sys/arch/sun3/sun3/
H A Dinterreg.h35 #define IREG_VIDEO_ENAB 0x10
/netbsd-6-1-5-RELEASE/sys/arch/x68k/x68k/
H A Dkgdb_proto.h64 #define KGDB_SEQ 0x10
/netbsd-6-1-5-RELEASE/sys/compat/svr4/
H A Dsvr4_fuser.h51 #define SVR4_F_OPEN 0x10
/netbsd-6-1-5-RELEASE/sys/arch/news68k/dev/
H A Dkbcreg.h44 #define KBCSTAT_MSBUF 0x10 /* mouse buffer full */
/netbsd-6-1-5-RELEASE/sys/arch/next68k/dev/
H A Dmb8795reg.h54 #define MB8795_TXSTAT_SHORTED 0x10 /* possible coax short */
82 #define MB8795_RXSTAT_RESET 0x10 /* reset packet received */
96 #define MB8795_RXMASK_RESETIE 0x10 /* rx int on reset packet */
123 #define MB8795_RXMODE_ADDRSIZE 0x10 /* reduces NODE match to 5 chars */
/netbsd-6-1-5-RELEASE/sys/arch/sgimips/dev/
H A Dctlreg.h50 #define CTL_AUX_CPUCTRL_CONSLED 0x10 /* Enable console led */
/netbsd-6-1-5-RELEASE/sys/dev/ic/
H A Dax88190reg.h41 #define AX88190_MEMR_EECS 0x10 /* EEPROM Chip Select */
H A Dnec765reg.h41 #define NE7_CB 0x10 /* Diskette Controller Busy */
H A Dosiopreg.h76 #define OSIOP_DSA 0x10 /* rw: Data Structure Address */
129 #define OSIOP_SCNTL0_WATN 0x10 /* (Select) With ATN */
140 #define OSIOP_SCNTL1_CON 0x10 /* Connected */
152 #define OSIOP_SIEN_SEL 0x10 /* (Re)Selected */
181 #define OSIOP_SEL 0x10
211 #define OSIOP_DSTAT_ABRT 0x10 /* Aborted */
222 #define OSIOP_SSTAT0_SEL 0x10 /* (Re)Selected */
233 #define OSIOP_SSTAT1_AIP 0x10 /* Arbitration in progress */
253 #define OSIOP_CTEST0_EAN 0x10 /* Enable Active Negation */
272 #define OSIOP_CTEST2_SFP 0x10 /* SCS
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H A Drtl80x9reg.h78 #define RTL3_CONFIG1_IRQS0 0x10
116 #define RTL3_CONFIG2_8029PF 0x10 /* Pause Flag */
124 #define RTL3_CONFIG2_8019BS4 0x10 /* BROM size/base */
136 #define RTL3_CONFIG3_LEDS0 0x10 /* LED0 pin configuration */
H A Dseeq8003reg.h58 #define RXCMD_IE_END 0x10 /* Interrupt on End of Frame */
71 #define RXSTAT_END 0x10 /* Received End of Frame */
118 #define TXCTRL_SHORT 0x10 /* Receive Short (<13 Bytes) Frames */
126 #define CFG_TX_NOCRC 0x10 /* No Not Append CRC */
H A Dz8530reg.h126 #define ZSM_RESET_STINT 0x10 /* reset external/status interrupt */
157 #define ZSWR1_RIE 0x10 /* rxint per char & on S.C. */
185 #define ZSWR3_HUNT 0x10 /* enter hunt mode */
203 #define ZSWR4_BISYNC 0x10 /* 16 bit sync char (sync only) */
231 #define ZSWR5_BREAK 0x10 /* send break (continuous 0s) */
253 #define ZSWR7P_DTR_TIME 0x10 /* modifies deact. speed of /DTR//REQ */
269 #define ZSWR9_STATUS_HIGH 0x10 /* status in high bits of intr vec */
287 #define ZSWR10_GA_ON_POLL 0x10 /* go active on poll (loop mode) */
307 #define ZSWR11_TXCLK_BAUD 0x10 /* xmit clock taken from BRG */
356 #define ZSWR14_LOCAL_LOOPBACK 0x10 /* se
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/netbsd-6-1-5-RELEASE/sys/dev/mii/
H A Dtlphyreg.h34 #define MII_TLPHY_ID 0x10 /* ThunderLAN PHY ID */
/netbsd-6-1-5-RELEASE/sys/dev/onewire/
H A Donewiredevs.h18 #define ONEWIRE_FAMILY_DS1920 0x10
/netbsd-6-1-5-RELEASE/sys/dev/pci/
H A Dif_levar.h32 #define PCNET_PCI_RDP 0x10
/netbsd-6-1-5-RELEASE/sys/arch/mac68k/include/
H A Dscsi_5380.h79 #define SCI_ICMD_ACK 0x10 /* rw: Assert ACK signal */
95 #define SCI_MODE_PERR_IE 0x10 /* rw: Interrupt on parity errors */
123 #define SCI_BUS_MSG 0x10 /* r: MSG signal */
138 #define SCI_CSR_INT 0x10 /* r: Interrupt request */
/netbsd-6-1-5-RELEASE/sys/arch/mips/alchemy/dev/
H A Daupscreg.h103 #define AUPSC_SPIPCR 0x10 /* R/W */
113 #define AUPSC_I2SPCR 0x10 /* R/W */
124 #define AUPSC_AC97PCR 0x10 /* R/W */
138 #define AUPSC_SMBPCR 0x10 /* R/W */
H A Dcom_aubus_reg.h15 #define AUCOM_FIFO 0x10 /* FIFO control (R/W) */

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