Searched refs:SImode (Results 76 - 100 of 185) sorted by relevance

12345678

/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/pdp11/
H A Dpdp11.c537 operands[0] = gen_rtx_MEM (SImode, operands[0]);
544 operands[1] = gen_rtx_MEM (SImode, operands[1]);
750 operands[1] = gen_rtx_MEM (SImode, operands[1]);
773 latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2);
775 latehalf[0] = adjust_address (operands[0], SImode, 4);
780 latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2);
782 latehalf[1] = adjust_address (operands[1], SImode, 4);
1156 else if (GET_MODE (x) == SImode)
1186 else if (GET_MODE (x) == SImode)
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/picochip/
H A Dpicochip.c440 set_optab_libfunc (clz_optab, SImode, "_clzsi2");
612 case SImode:
613 /* SImode must be broken down into parallel HImode register saves. */
787 case SImode:
1862 picochip_emit_save_register (gen_rtx_REG (SImode, LINK_REGNUM),
1873 next register also needs to be saved, use a SImode save,
1885 picochip_emit_save_register (gen_rtx_REG (SImode, i),
1915 picochip_emit_save_register (gen_rtx_REG (SImode, 0), stdarg_offset);
1916 picochip_emit_save_register (gen_rtx_REG (SImode, 2),
1918 picochip_emit_save_register (gen_rtx_REG (SImode,
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/
H A Dloop-iv.c1695 || GET_MODE (cond) != SImode)
1696 cond = gen_rtx_fmt_ee (code, SImode, op0, op1);
2030 cond_under = simplify_gen_relational (LT, SImode, iv->extend_mode,
2032 cond_over = simplify_gen_relational (GT, SImode, iv->extend_mode,
2405 assumption = simplify_gen_relational (EQ, SImode, mode, tmp,
2415 assumption = simplify_gen_relational (EQ, SImode, mode, tmp,
2501 may_xform = simplify_gen_relational (cond, SImode, mode,
2504 SImode, mode,
2513 may_xform = simplify_gen_relational (cond, SImode, mode,
2516 SImode, mod
[all...]
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/
H A Dloop-iv.c1584 || GET_MODE (cond) != SImode)
1585 cond = gen_rtx_fmt_ee (code, SImode, op0, op1);
1828 cond_under = simplify_gen_relational (LT, SImode, iv->extend_mode,
1830 cond_over = simplify_gen_relational (GT, SImode, iv->extend_mode,
2150 assumption = simplify_gen_relational (EQ, SImode, mode, tmp,
2160 assumption = simplify_gen_relational (EQ, SImode, mode, tmp,
2246 may_xform = simplify_gen_relational (cond, SImode, mode,
2249 SImode, mode,
2258 may_xform = simplify_gen_relational (cond, SImode, mode,
2261 SImode, mod
[all...]
H A Dcfgloopanal.c515 rtx reg1 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER);
516 rtx reg2 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER + 1);
518 rtx mem = validize_mem (gen_rtx_MEM (SImode, addr));
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/rs6000/
H A Drs6000.c275 const int mulsi; /* cost of SImode multiplication. */
276 const int mulsi_const; /* cost of SImode multiplication by constant. */
277 const int mulsi_const9; /* cost of SImode mult by short constant. */
279 const int divsi; /* cost of SImode division. */
2095 the corresponding "float" is interpreted as an SImode integer. */
2103 tmp = gen_lowpart (SImode, tmp);
2229 return gen_rtx_VEC_DUPLICATE (V4SImode, gen_lowpart (SImode, last));
2549 && mode == SImode
2564 && mode == SImode
2832 || mode != SImode || GET_COD
13895 PUT_MODE (SET_DEST (real2), SImode); local
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/rs6000/
H A Drs6000.c325 const int mulsi; /* cost of SImode multiplication. */
326 const int mulsi_const; /* cost of SImode multiplication by constant. */
327 const int mulsi_const9; /* cost of SImode mult by short constant. */
329 const int divsi; /* cost of SImode division. */
2329 rs6000_pmode = (int)SImode;
3907 the corresponding "float" is interpreted as an SImode integer. */
3915 tmp = gen_lowpart (SImode, tmp);
4045 return gen_rtx_VEC_DUPLICATE (V4SImode, gen_lowpart (SImode, last));
4589 && (mode == SImode || mode == DImode || mode == TImode
4610 && mode == SImode
6332 adjust_address (copy_rtx (operands[1]), SImode, 4)); local
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/moxie/
H A Dmoxie.h395 #define Pmode SImode
486 #define CASE_VECTOR_MODE SImode
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/bfin/
H A Dbfin.h291 #define FUNCTION_MODE SImode
292 #define Pmode SImode
341 #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO)
1102 (MODE) = SImode; \
1135 #define CASE_VECTOR_MODE SImode
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/bfin/
H A Dbfin.c562 rtx tmpreg = gen_rtx_REG (SImode, REG_P1);
725 rtx predec1 = gen_rtx_PRE_DEC (SImode, spreg);
726 rtx predec = gen_rtx_MEM (SImode, predec1);
746 insn = emit_move_insn (predec, gen_rtx_REG (SImode, REG_ASTAT));
764 insn = emit_move_insn (predec, gen_rtx_REG (SImode, i));
781 rtx r0reg = gen_rtx_REG (SImode, REG_R0);
782 rtx r1reg = gen_rtx_REG (SImode, REG_R1);
783 rtx r2reg = gen_rtx_REG (SImode, REG_R2);
786 insn = emit_move_insn (r0reg, gen_rtx_REG (SImode, REG_SEQSTAT));
815 rtx postinc1 = gen_rtx_POST_INC (SImode, spre
[all...]
H A Dbfin.h76 #define FUNCTION_MODE SImode
77 #define Pmode SImode
887 (MODE) = SImode; \
920 #define CASE_VECTOR_MODE SImode
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/v850/
H A Dv850.h178 { (MODE) = SImode; }
699 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 16)), \
701 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 20)), \
1109 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode)
1151 #define Pmode SImode
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/s390/
H A Ds390.c358 return TARGET_64BIT ? DImode : SImode;
364 return TARGET_64BIT ? DImode : SImode;
787 && GET_MODE (*op0) == SImode
836 /* Emit a SImode compare and swap instruction setting MEM to NEW_RTX if OLD
1365 in memory. Otherwise perform the operation in SImode. */
1367 wmode = SImode;
1855 || (GET_MODE (base) != SImode
1903 || (GET_MODE (indx) != SImode
2242 return trunc_int_for_mode (value, SImode) == value;
2246 || s390_single_part (GEN_INT (value), DImode, SImode,
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/mips/
H A Dmips.c227 above. The function's return value is an SImode boolean that is
2627 return (Pmode == SImode
2699 vec = gen_rtvec (3, reg, symbol, gen_rtx_REG (SImode, GOT_VERSION_REGNUM));
2735 return (Pmode == SImode
3477 if (TARGET_64BIT && mode == DImode && GET_MODE (op) == SImode)
3478 /* A sign extension from SImode to DImode in 64-bit mode is free. */
3499 if (TARGET_64BIT && mode == DImode && GET_MODE (op) == SImode)
3900 return mips_address_insns (addr, SImode, false);
4566 SImode, thus possibly narrower than that of the comparison's operands. */
6763 emit_insn (Pmode == SImode
[all...]
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/alpha/
H A Dalpha.c690 case SImode:
1501 /* REF is an alignable memory location. Place an aligned SImode
1538 *paligned_mem = widen_memory_access (ref, SImode, -offset);
1801 will fail during some split phases. The SImode add patterns
1824 no instructions left, don't bother. Likewise, if this is SImode and
1828 if (n == 1 || (mode == SImode && no_new_pseudos))
1957 /* We are only called for SImode and DImode. If this is SImode, ensure that
1960 if (mode == SImode)
1994 /* If we can't make any pseudos, TARGET is an SImode har
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/arc/
H A Darc.h140 (MODE) = SImode; \
1043 #define Pmode SImode
1046 #define FUNCTION_MODE SImode
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/mcore/
H A Dmcore.h124 (MODE) = SImode; \
753 #define CASE_VECTOR_MODE SImode
794 #define Pmode SImode
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/v850/
H A Dv850.h177 { (MODE) = SImode; }
973 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode)
1015 #define Pmode SImode
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/i386/
H A Di386.c61 : (mode) == SImode ? 2 \
81 in QImode, HImode and SImode.
90 in SImode and DImode */
92 in SImode and DImode */
95 in SImode, DImode and TImode */
97 in SImode, DImode and TImode */
126 in QImode, HImode and SImode.
135 in SImode and DImode */
137 in SImode and DImode */
140 in SImode, DImod
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/cris/
H A Dcris.h357 ? SImode : MODE
800 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CRIS_STACKADJ_REG)
986 ((MEM_P (X) && GET_MODE (X) == SImode \
1371 possible add an option to emit SImode case-tables. */
1393 #define Pmode SImode
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/h8300/
H A Dh8300.h290 || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \
292 || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode))))
789 ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \
930 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode)
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/iq2000/
H A Diq2000.h100 We promote any value smaller than SImode up to SImode. */
105 (MODE) = SImode;
667 #define CASE_VECTOR_MODE SImode
683 #define Pmode SImode
685 #define FUNCTION_MODE SImode
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/h8300/
H A Dh8300.h279 || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \
281 || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode))))
693 Pmode == SImode
831 ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \
996 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode)
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/s390/
H A Ds390.h345 SImode and DImode fit into FPRs as well.
371 (((MODE) == SImode || (MODE) == DImode \
383 (((MODE) == SImode || ((enum machine_mode) (MODE) == Pmode)) \
995 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1004 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/m32c/
H A Dm32c.c767 else if (mode == SImode)
1042 mode = SImode;
1251 enum machine_mode mode = (bytes == 2) ? HImode : SImode;
1513 || mode == SImode
2176 /* Used in negsi2 to do HImode ops on the two parts of an SImode
2178 if (code == 'h' && GET_MODE (x) == SImode)
2180 x = m32c_subreg (HImode, x, SImode, 0);
2183 if (code == 'H' && GET_MODE (x) == SImode)
2185 x = m32c_subreg (HImode, x, SImode, 2);
2569 else if (outer == SImode)
[all...]

Completed in 557 milliseconds

12345678