Searched refs:getOpcode (Results 76 - 100 of 267) sorted by relevance

1234567891011

/macosx-10.10.1/llvmCore-3425.0.34/lib/Transforms/Utils/
H A DSimplifyIndVar.cpp93 switch (UseInst->getOpcode()) {
115 if (UseInst->getOpcode() == Instruction::LShr) {
244 bool IsSigned = Rem->getOpcode() == Instruction::SRem;
245 if (IsSigned || Rem->getOpcode() == Instruction::URem) {
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp211 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
218 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
226 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL)
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp209 if (MInst->getOpcode() == TargetOpcode::DBG_VALUE ||
210 MInst->getOpcode() == TargetOpcode::IMPLICIT_DEF) {
232 if (MI->getOpcode() == Hexagon::ENDLOOP0) {
H A DHexagonHardwareLoops.cpp204 return MI->getOpcode() == Hexagon::LOOP0_r ||
205 MI->getOpcode() == Hexagon::LOOP0_i;
211 return MI->getOpcode() == Hexagon::CMPEQri;
355 if (DefInstr && DefInstr->getOpcode() == Hexagon::TFRI) {
375 return (MI->getOpcode() ==
523 if (LastI->getOpcode() == Hexagon::JMP_c ||
524 LastI->getOpcode() == Hexagon::JMP_cNot) {
H A DHexagonFrameLowering.cpp108 assert((MI->getOpcode() == Hexagon::ADJDYNALLOC) &&
167 unsigned RetOpcode = MBBI->getOpcode();
191 if (STI.hasV4TOps() && MBBI->getOpcode() == Hexagon::JMPR
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/MCTargetDesc/
H A DMBlazeMCCodeEmitter.cpp136 switch (MI.getOpcode()) {
160 switch (MI.getOpcode()) {
180 unsigned Opcode = MI.getOpcode();
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
114 unsigned RetOpcode = MBBI->getOpcode();
142 unsigned Opc = PI->getOpcode();
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp76 if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
79 } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp869 switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
895 EVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
1133 if (Node->getOpcode() == ISD::TargetConstant) // Allow illegal target nodes.
1145 Node->getOperand(i).getOpcode() == ISD::TargetConstant) &&
1151 switch (Node->getOpcode()) {
1156 Action = TLI.getOperationAction(Node->getOpcode(), MVT::Other);
1159 Action = TLI.getOperationAction(Node->getOpcode(),
1162 Action = TLI.getOperationAction(Node->getOpcode(), MVT::Other);
1167 Action = TLI.getOperationAction(Node->getOpcode(),
1173 Action = TLI.getOperationAction(Node->getOpcode(), InnerTyp
[all...]
H A DLegalizeIntegerTypes.cpp43 switch (N->getOpcode()) {
169 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
182 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
196 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
315 Op = DAG.getNode(N->getOpcode(), dl, NVT, Op);
333 if (N->getOpcode() == ISD::CTTZ) {
341 return DAG.getNode(N->getOpcode(), dl, NVT, Op);
353 unsigned NewOpc = N->getOpcode();
360 if (N->getOpcode() == ISD::FP_TO_UINT &&
370 return DAG.getNode(N->getOpcode()
[all...]
H A DSelectionDAG.cpp115 if (N->getOpcode() == ISD::BITCAST)
118 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
123 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
153 N->getOperand(i).getOpcode() != ISD::UNDEF)
163 if (N->getOpcode() == ISD::BITCAST)
166 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
171 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
193 N->getOperand(i).getOpcode() != ISD::UNDEF)
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
205 if (N->getOpcode() !
[all...]
H A DSelectionDAGDumper.cpp34 switch (getOpcode()) {
36 if (getOpcode() < ISD::BUILTIN_OP_END)
43 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
47 const char *Name = TLI.getTargetNodeName(getOpcode());
49 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
51 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
109 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
H A DSelectionDAGISel.cpp443 const MCInstrDesc &MCID = TM.getInstrInfo()->get(II->getOpcode());
529 if (N->getOpcode() != ISD::CopyToReg)
768 if (ResNode == Node || Node->getOpcode() == ISD::DELETED_NODE)
913 switch (I->getOpcode()) {
1728 if (ChainNode->getOpcode() == ISD::DELETED_NODE)
1757 if (FRN->getOpcode() == ISD::DELETED_NODE)
1810 User->getOpcode() == ISD::HANDLENODE) // Root of the graph.
1813 unsigned UserOpcode = User->getOpcode();
1827 if (User->getOpcode() != ISD::TokenFactor) {
1931 if (N->getOpcode() !
[all...]
H A DLegalizeVectorTypes.cpp39 switch (N->getOpcode()) {
131 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
139 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
230 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
237 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
319 if (Arg.getOpcode() == ISD::UNDEF)
357 switch (N->getOpcode()) {
465 switch (N->getOpcode()) {
572 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
573 Hi = DAG.getNode(N->getOpcode(), d
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/
H A DMLxExpansionPass.cpp190 unsigned Opcode = MCID.getOpcode();
220 if (TII->isFpMLxInstruction(DefMI->getOpcode())) {
237 return isFpMulInstruction(DefMI->getOpcode()) || hasLoopHazard(MI);
255 if (TII->canCauseFpMLxStall(NextMI->getOpcode())) {
361 if (!TII->isFpMLxInstruction(MCID.getOpcode(),
H A DARMConstantIslandPass.cpp602 assert(CPEMI && CPEMI->getOpcode() == ARM::CONSTPOOL_ENTRY);
625 if (I->isBranch() && I->getOpcode() == ARM::t2BR_JT)
667 int Opc = I->getOpcode();
816 if (!MBB->empty() && MBB->back().getOpcode() == ARM::tBR_JTr) {
1063 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB
1064 || PredMI->getOpcode() == ARM::t2B)
1341 if (MI->getOpcode() == ARM::t2IT)
1595 BMI->getOpcode() == Br.UncondBr) {
1632 BuildMI(MBB, DebugLoc(), TII->get(MI->getOpcode()))
[all...]
H A DThumb2SizeReduction.cpp296 unsigned Opc = MI->getOpcode();
492 unsigned Opc = MI->getOpcode();
602 if (MI->getOpcode() == ARM::t2MUL) {
779 if ((MCID.getOpcode() == ARM::t2RSBSri ||
780 MCID.getOpcode() == ARM::t2RSBri ||
781 MCID.getOpcode() == ARM::t2SXTB ||
782 MCID.getOpcode() == ARM::t2SXTH ||
783 MCID.getOpcode() == ARM::t2UXTB ||
784 MCID.getOpcode() == ARM::t2UXTH) && i == 2)
868 unsigned Opcode = MI->getOpcode();
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/
H A DPPCISelLowering.cpp749 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue;
795 if (N->getOperand(i).getOpcode() == ISD::UNDEF) continue;
851 if (N->getOpcode() != ISD::Constant)
872 if (N.getOpcode() == ISD::ADD) {
875 if (N.getOperand(1).getOpcode() == PPCISD::Lo)
881 } else if (N.getOpcode() == ISD::OR) {
921 if (N.getOpcode() == ISD::ADD) {
931 } else if (N.getOperand(1).getOpcode() == PPCISD::Lo) {
936 assert(Disp.getOpcode() == ISD::TargetGlobalAddress ||
937 Disp.getOpcode()
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Transforms/InstCombine/
H A DInstructionCombining.cpp122 // The No Signed Wrap flag can be kept if the operation "B (I.getOpcode) C",
133 Instruction::BinaryOps Opcode = I.getOpcode();
181 Instruction::BinaryOps Opcode = I.getOpcode();
197 if (Op0 && Op0->getOpcode() == Opcode) {
226 if (Op1 && Op1->getOpcode() == Opcode) {
248 if (Op0 && Op0->getOpcode() == Opcode) {
268 if (Op1 && Op1->getOpcode() == Opcode) {
290 Op0->getOpcode() == Opcode && Op1->getOpcode() == Opcode &&
379 Instruction::BinaryOps TopLevelOpcode = I.getOpcode(); // o
[all...]
H A DInstCombineCasts.cpp44 if (I->getOpcode() == Instruction::Shl) {
51 if (I->getOpcode() == Instruction::Mul) {
58 if (I->getOpcode() == Instruction::Add) {
167 unsigned Opc = I->getOpcode();
239 Instruction::CastOps firstOp = Instruction::CastOps(CI->getOpcode());
289 isEliminableCastPair(CSrc, CI.getOpcode(), CI.getType(), TD)) {
346 unsigned Opc = I->getOpcode();
659 unsigned Opc = I->getOpcode(), Tmp;
828 if (SrcI && SrcI->getOpcode() == Instruction::Or) {
843 if (SrcI && SrcI->getOpcode()
[all...]
H A DInstCombinePHI.cpp27 unsigned Opc = FirstInst->getOpcode();
46 if (!I || I->getOpcode() != Opc || !I->hasOneUse() ||
114 CmpInst *NewCI = CmpInst::Create(CIOp->getOpcode(), CIOp->getPredicate(),
122 BinaryOperator::Create(BinOp->getOpcode(), LHSVal, RHSVal);
484 CastInst *NewCI = CastInst::Create(FirstCI->getOpcode(), PhiVal,
491 BinOp = BinaryOperator::Create(BinOp->getOpcode(), PhiVal, ConstantOp);
500 CmpInst *NewCI = CmpInst::Create(CIOp->getOpcode(), CIOp->getPredicate(),
673 if (User->getOpcode() != Instruction::LShr ||
802 cast<Instruction>(PN.getIncomingValue(0))->getOpcode() ==
803 cast<Instruction>(PN.getIncomingValue(1))->getOpcode()
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/
H A DX86InstrInfo.cpp1347 switch (MI.getOpcode()) {
1370 switch (MI.getOpcode()) {
1471 if (isFrameLoadOpcode(MI->getOpcode()))
1479 if (isFrameLoadOpcode(MI->getOpcode())) {
1492 if (isFrameStoreOpcode(MI->getOpcode()))
1501 if (isFrameStoreOpcode(MI->getOpcode())) {
1522 if (DefMI->getOpcode() != X86::MOVPC32r)
1533 switch (MI->getOpcode()) {
1697 unsigned Opc = Orig->getOpcode();
1873 unsigned MIOpc = MI->getOpcode();
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Analysis/
H A DConstantFolding.cpp233 if (CE->getOpcode() == Instruction::PtrToInt ||
234 CE->getOpcode() == Instruction::BitCast)
238 if (CE->getOpcode() == Instruction::GetElementPtr) {
380 if (CE->getOpcode() == Instruction::IntToPtr &&
468 if (CE->getOpcode() == Instruction::GetElementPtr) {
646 if (CE && CE->getOpcode() == Instruction::Sub &&
691 if (CE->getOpcode() == Instruction::IntToPtr)
855 return ConstantFoldInstOperands(I->getOpcode(), I->getType(), Ops, TD, TLI);
877 return ConstantFoldInstOperands(CE->getOpcode(), CE->getType(), Ops, TD, TLI);
916 if (TD && CE->getOpcode()
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/
H A DInstructions.h117 return (I->getOpcode() == Instruction::Alloca);
237 return I->getOpcode() == Instruction::Load;
359 return I->getOpcode() == Instruction::Store;
431 return I->getOpcode() == Instruction::Fence;
531 return I->getOpcode() == Instruction::AtomicCmpXchg;
675 return I->getOpcode() == Instruction::AtomicRMW;
854 return (I->getOpcode() == Instruction::GetElementPtr);
1036 return I->getOpcode() == Instruction::ICmp;
1146 return I->getOpcode() == Instruction::FCmp;
1368 return I->getOpcode()
1467 OtherOps getOpcode() const { function in class:llvm::SelectInst
[all...]
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/
H A DXCoreISelLowering.cpp168 switch (Op.getOpcode())
198 switch (N->getOpcode()) {
356 if (Addr.getOpcode() != ISD::ADD) {
366 if (Base.getOpcode() == ISD::ADD &&
367 Base.getOperand(1).getOpcode() == ISD::SHL) {
380 if (Root->getOpcode() == XCoreISD::DPRelativeWrapper ||
381 Root->getOpcode() == XCoreISD::CPRelativeWrapper) {
564 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI &&
581 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::UMUL_LOHI &&
604 if (Op.getOpcode() !
[all...]

Completed in 416 milliseconds

1234567891011