Searched refs:R4 (Results 76 - 96 of 96) sorted by relevance
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/macosx-10.10/rsync-45/rsync/ |
H A D | config.guess | 456 m88k:*:4*:R4*)
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/macosx-10.10/ruby-106/ruby/tool/ |
H A D | config.guess | 480 m88k:*:4*:R4*)
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H A D | config.guess.orig | 480 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/expect/expect/tclconfig/ |
H A D | config.guess | 460 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/ffidl/ffidl/tclconfig/ |
H A D | config.guess | 452 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/mk4tcl/metakit/unix/scripts/ |
H A D | config.guess | 461 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/tkimg/tkimg/compat/libjpeg/ |
H A D | config.guess | 476 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/tkimg/tkimg/compat/libpng/ |
H A D | config.guess | 473 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/tkimg/tkimg/compat/libtiff/config/ |
H A D | config.guess | 457 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/tkimg/tkimg/compat/libtiff/ |
H A D | config.guess | 460 m88k:*:4*:R4*)
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/macosx-10.10/tcl-105/tcl_ext/tkimg/tkimg/tools/ |
H A D | config.guess | 456 m88k:*:4*:R4*)
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/macosx-10.10/tcpdump-61/tcpdump/ |
H A D | config.guess | 477 m88k:*:4*:R4*)
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/macosx-10.10/tcsh-65/tcsh/ |
H A D | config.guess | 473 m88k:*:4*:R4*)
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/macosx-10.10/xar-254/xar/ |
H A D | config.guess | 452 m88k:*:4*:R4*)
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/macosx-10.10/zsh-61/zsh/ |
H A D | config.guess | 476 m88k:*:4*:R4*)
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 415 setExceptionSelectorRegister(PPC::R4); 1640 PPC::R3, PPC::R4, PPC::R5, PPC::R6, 1873 PPC::R3, PPC::R4, PPC::R5, PPC::R6, 1973 PPC::R3, PPC::R4, PPC::R5, PPC::R6, 3289 PPC::R3, PPC::R4, PPC::R5, PPC::R6,
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 164 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 2480 .Case("v1", ARM::R4) 2816 case ARM::R2: return ARM::R3; case ARM::R3: return ARM::R4; 2817 case ARM::R4: return ARM::R5; case ARM::R5: return ARM::R6;
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1416 for (i = 0, j = CCInfo.getFirstByValReg(); j < ARM::R4; i++, j++) { 1425 offset = ARM::R4 - CCInfo.getFirstByValReg(); 1667 unsigned excess = 4 * (ARM::R4 - reg); 2517 NumGPRs = ARM::R4 - CCInfo.getFirstByValReg();
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 1212 SPU::R3, SPU::R4, SPU::R5, SPU::R6, SPU::R7, SPU::R8, SPU::R9,
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/macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 908 ARM::R4, ARM::R5, ARM::R6, ARM::R7,
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