/linux-master/arch/arm/common/ |
H A D | sa1111.c | 217 writel_relaxed(stat0, mapbase + SA1111_INTSTATCLR0); 221 writel_relaxed(stat1, mapbase + SA1111_INTSTATCLR1); 275 writel_relaxed(ie, mapbase + SA1111_INTEN0); 294 writel_relaxed(ip ^ mask, mapbase + SA1111_INTPOL0); 295 writel_relaxed(ip, mapbase + SA1111_INTPOL0); 326 writel_relaxed(ip, mapbase + SA1111_INTPOL0); 327 writel_relaxed(ip, mapbase + SA1111_WAKEPOL0); 343 writel_relaxed(we, mapbase + SA1111_WAKEEN0); 401 writel_relaxed(0, irqbase + SA1111_INTEN0); 402 writel_relaxed( [all...] |
/linux-master/drivers/clocksource/ |
H A D | timer-imx-gpt.c | 99 writel_relaxed(tmp & ~MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL); 104 writel_relaxed(0, imxtm->base + V2_IR); 112 writel_relaxed(tmp | MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL); 117 writel_relaxed(1<<0, imxtm->base + V2_IR); 122 writel_relaxed(0, imxtm->base + MX1_2_TSTAT); 127 writel_relaxed(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, 133 writel_relaxed(V2_TSTAT_OF1, imxtm->base + V2_TSTAT); 180 writel_relaxed(tcmp, imxtm->base + MX1_2_TCMP); 194 writel_relaxed(tcmp, imxtm->base + V2_TCMP); 211 writel_relaxed(tc [all...] |
H A D | timer-sprd.c | 49 writel_relaxed(val, base + TIMER_CTL); 57 writel_relaxed(val, base + TIMER_CTL); 62 writel_relaxed(cycles & TIMER_VALUE_LO_MASK, base + TIMER_LOAD_LO); 63 writel_relaxed(0, base + TIMER_LOAD_HI); 68 writel_relaxed(TIMER_INT_EN, base + TIMER_INT); 76 writel_relaxed(val, base + TIMER_INT);
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H A D | timer-rda.c | 46 writel_relaxed(RDA_TIMER_IRQ_MASK_OSTIMER, 50 writel_relaxed(load_l, base + RDA_OSTIMER_LOADVAL_L); 51 writel_relaxed(ctrl, base + RDA_OSTIMER_CTRL); 59 writel_relaxed(RDA_TIMER_IRQ_MASK_OSTIMER, 62 writel_relaxed(0, base + RDA_OSTIMER_CTRL); 120 writel_relaxed(RDA_TIMER_IRQ_CLR_OSTIMER,
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H A D | timer-stm32.c | 101 writel_relaxed(0, timer_of_base(to) + TIM_DIER); 114 writel_relaxed(TIM_CR1_UDIS | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1); 133 writel_relaxed(next, timer_of_base(to) + TIM_CCR1); 139 writel_relaxed(TIM_DIER_CC1IE, timer_of_base(to) + TIM_DIER); 167 writel_relaxed(0, timer_of_base(to) + TIM_SR); 192 writel_relaxed(UINT_MAX, timer_of_base(to) + TIM_ARR); 222 writel_relaxed(prescaler - 1, timer_of_base(to) + TIM_PSC); 223 writel_relaxed(TIM_EGR_UG, timer_of_base(to) + TIM_EGR); 224 writel_relaxed(0, timer_of_base(to) + TIM_SR);
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/linux-master/drivers/clk/tegra/ |
H A D | clk-periph-gate.c | 22 writel_relaxed(val, gate->clk_base + (gate->regs->enb_set_reg)) 24 writel_relaxed(val, gate->clk_base + (gate->regs->enb_clr_reg)) 29 writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg)) 59 writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE); 60 writel_relaxed(BIT(22), gate->clk_base + LVL2_CLK_GATE_OVRE); 62 writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE);
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/linux-master/arch/arm/mach-hisi/ |
H A D | platsmp.c | 28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); 112 writel_relaxed(0xe51ff004, virt); /* ldr pc, [pc, #-4] */ 113 writel_relaxed(jump_addr, virt + 4); /* pc jump phy address */ 148 writel_relaxed(0xe51ff004, virt); 149 writel_relaxed(jump_addr, virt + 4); 173 writel_relaxed(remap_reg_value, ctrl_base + REG_SC_CTRL);
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/linux-master/drivers/irqchip/ |
H A D | irq-rda-intc.c | 32 writel_relaxed(BIT(d->hwirq), rda_intc_base + RDA_INTC_MASK_CLR); 37 writel_relaxed(BIT(d->hwirq), rda_intc_base + RDA_INTC_MASK_SET); 92 writel_relaxed(RDA_IRQ_MASK_ALL, rda_intc_base + RDA_INTC_MASK_CLR);
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H A D | irq-tegra.c | 88 writel_relaxed(mask, base + reg); 151 writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_COP_IER_CLR); 154 writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_CPU_IER_CLR); 157 writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET); 173 writel_relaxed(lic->cpu_iep[i], 175 writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_CPU_IER_CLR); 176 writel_relaxed(lic->cpu_ier[i], 178 writel_relaxed(lic->cop_iep[i], 180 writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_COP_IER_CLR); 181 writel_relaxed(li [all...] |
H A D | irq-imx-gpcv2.c | 49 writel_relaxed(cd->wakeup_sources[i], reg); 65 writel_relaxed(cd->saved_irq_mask[i], gpcv2_idx_to_reg(cd, i)); 105 writel_relaxed(val, reg); 121 writel_relaxed(val, reg); 258 writel_relaxed(~0, reg + GPC_IMR1_CORE2); 259 writel_relaxed(~0, reg + GPC_IMR1_CORE3); 262 writel_relaxed(~0, reg + GPC_IMR1_CORE0); 263 writel_relaxed(~0, reg + GPC_IMR1_CORE1); 276 writel_relaxed(~0x1, cd->gpc_base + cd->cpu2wakeup);
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/linux-master/arch/arm/mach-spear/ |
H A D | spear13xx.c | 39 writel_relaxed(0x06, VA_L2CC_BASE + L310_PREFETCH_CTRL); 45 writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL); 46 writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL);
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/linux-master/arch/arm/mach-bcm/ |
H A D | bcm_kona_smc.c | 127 writel_relaxed(data->arg0, args++); 128 writel_relaxed(data->arg1, args++); 129 writel_relaxed(data->arg2, args++);
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/linux-master/drivers/pci/controller/dwc/ |
H A D | pcie-fu740.c | 85 writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_PERST_N); 91 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PERST_N); 137 writel_relaxed(addr, phy_cr_para_addr); 138 writel_relaxed(wrdata, phy_cr_para_wr_data); 139 writel_relaxed(1, phy_cr_para_wr_en); 147 writel_relaxed(0, phy_cr_para_wr_en); 158 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_SEL); 159 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_SEL); 203 writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); 258 writel_relaxed( [all...] |
/linux-master/drivers/watchdog/ |
H A D | sp805_wdt.c | 142 writel_relaxed(UNLOCK, wdt->base + WDTLOCK); 143 writel_relaxed(0, wdt->base + WDTCONTROL); 144 writel_relaxed(0, wdt->base + WDTLOAD); 145 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL); 169 writel_relaxed(UNLOCK, wdt->base + WDTLOCK); 170 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD); 171 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR); 174 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + 177 writel_relaxed(LOCK, wdt->base + WDTLOCK); 204 writel_relaxed(UNLOC [all...] |
H A D | apple_wdt.c | 71 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME); 72 writel_relaxed(APPLE_WDT_CTRL_RESET_EN, wdt->regs + APPLE_WDT_WD1_CTRL); 81 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CTRL); 90 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME); 99 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME); 100 writel_relaxed(wdt->clk_rate * s, wdt->regs + APPLE_WDT_WD1_BITE_TIME); 123 writel_relaxed(APPLE_WDT_CTRL_RESET_EN, wdt->regs + APPLE_WDT_WD1_CTRL); 124 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_BITE_TIME); 125 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME);
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/linux-master/arch/arm/mach-omap2/ |
H A D | omap-hotplug.c | 39 writel_relaxed(0, base + OMAP_AUX_CORE_BOOT_0);
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H A D | prcm_mpu44xx.c | 35 writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
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H A D | omap_phy_internal.c | 47 writel_relaxed(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
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/linux-master/arch/arm/mach-versatile/ |
H A D | dcscb.c | 49 writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4); 65 writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4); 78 writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4); 90 writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
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/linux-master/drivers/hwmon/ |
H A D | as370-hwmon.c | 38 writel_relaxed(val, addr); 40 writel_relaxed(val, addr); 42 writel_relaxed(val, addr); 44 writel_relaxed(val, addr);
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/linux-master/arch/arm/mach-imx/ |
H A D | src.c | 68 writel_relaxed(val, src_base + SRC_SCR); 87 writel_relaxed(enable, gpc_base + offset); 108 writel_relaxed(val, gpc_base + reg); 116 writel_relaxed(val, gpc_base + reg); 135 writel_relaxed(val, src_base + SRC_A7RCR1); 141 writel_relaxed(val, src_base + SRC_SCR); 149 writel_relaxed(__pa_symbol(jump_addr), 162 writel_relaxed(arg, src_base + SRC_GPR1(gpr_v2) + cpu * 8 + 4); 183 writel_relaxed(val, src_base + SRC_SCR);
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/linux-master/drivers/media/platform/qcom/camss/ |
H A D | camss-vfe-480.c | 110 writel_relaxed(IRQ_MASK_0_RESET_ACK, vfe->base + VFE_IRQ_MASK(0)); 111 writel_relaxed(GLOBAL_RESET_HW_AND_REG, vfe->base + VFE_GLOBAL_RESET_CMD); 122 writel_relaxed(WM_CGC_OVERRIDE_ALL, vfe->base + VFE_BUS_WM_CGC_OVERRIDE); 124 writel_relaxed(0x0, vfe->base + VFE_BUS_WM_TEST_BUS_CTRL); 126 writel_relaxed(pix->plane_fmt[0].bytesperline * pix->height, 128 writel_relaxed(0xf, vfe->base + VFE_BUS_WM_BURST_LIMIT(wm)); 129 writel_relaxed(WM_IMAGE_CFG_0_DEFAULT_WIDTH, 131 writel_relaxed(pix->plane_fmt[0].bytesperline, 133 writel_relaxed(0, vfe->base + VFE_BUS_WM_PACKER_CFG(wm)); 136 writel_relaxed( [all...] |
/linux-master/drivers/gpio/ |
H A D | gpio-pxa.c | 275 writel_relaxed(value, base + GPDR_OFFSET); 289 writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); 304 writel_relaxed(tmp, base + GPDR_OFFSET); 322 writel_relaxed(GPIO_bit(offset), 386 writel_relaxed(grer, c->regbase + GRER_OFFSET); 387 writel_relaxed(gfer, c->regbase + GFER_OFFSET); 413 writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET); 415 writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET); 447 writel_relaxed(gedr, c->regbase + GEDR_OFFSET); 483 writel_relaxed(GPIO_bi [all...] |
/linux-master/drivers/char/hw_random/ |
H A D | stm32-rng.c | 109 writel_relaxed(cr | RNG_CR_CONDRST, priv->base + RNG_CR); 110 writel_relaxed(cr & ~RNG_CR_CONDRST, priv->base + RNG_CR); 113 writel_relaxed(sr & ~RNG_SR_SEIS, priv->base + RNG_SR); 159 writel_relaxed(sr & ~RNG_SR_SEIS, priv->base + RNG_SR); 231 writel_relaxed(0, priv->base + RNG_SR); 296 writel_relaxed(0, priv->base + RNG_SR); 314 writel_relaxed(reg, priv->base + RNG_CR); 317 writel_relaxed(priv->data->htcr, priv->base + RNG_HTCR); 318 writel_relaxed(priv->data->nscr & RNG_NSCR_MASK, priv->base + RNG_NSCR); 325 writel_relaxed(re [all...] |
/linux-master/drivers/soc/qcom/ |
H A D | qcom-geni-se.c | 210 writel_relaxed(val, base + SE_IRQ_EN); 214 writel_relaxed(val, base + SE_GENI_DMA_MODE_EN); 216 writel_relaxed(0, base + SE_GSI_EVENT_EN); 225 writel_relaxed(val, base + GENI_CGC_CTRL); 230 writel_relaxed(val, base + SE_DMA_GENERAL_CFG); 232 writel_relaxed(DEFAULT_IO_OUTPUT_CTRL_MSK, base + GENI_OUTPUT_CTRL); 233 writel_relaxed(FORCE_DEFAULT, base + GENI_FORCE_DEFAULT_REG); 238 writel_relaxed(0, se->base + SE_GSI_EVENT_EN); 239 writel_relaxed(0xffffffff, se->base + SE_GENI_M_IRQ_CLEAR); 240 writel_relaxed( [all...] |