/linux-master/drivers/gpu/host1x/hw/ |
H A D | debug_hw.c | 41 static unsigned int show_channel_command(struct output *o, u32 val, argument 46 opcode = val >> 28; 50 mask = val & 0x3f; 53 val >> 6 & 0x3ff, 54 val >> 16 & 0xfff, mask); 58 host1x_debug_cont(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff); 62 num = val & 0xffff; 64 val >> 16 & 0xfff); 71 num = val & 0xffff; 73 val >> 1 180 u32 val = *(map_addr + offset / 4 + i); local [all...] |
/linux-master/drivers/clk/imx/ |
H A D | clk-divider-gate.c | 30 unsigned int val; local 32 val = readl(div->reg) >> div->shift; 33 val &= clk_div_mask(div->width); 34 if (!val) 37 return divider_recalc_rate(hw, parent_rate, val, div->table, 47 unsigned int val; local 52 val = div_gate->cached_val; 54 val = readl(div->reg) >> div->shift; 55 val &= clk_div_mask(div->width); 60 if (!val) 80 u32 val; local 108 u32 val; local 131 u32 val; local 147 u32 val; local 185 u32 val; local [all...] |
/linux-master/drivers/hwtracing/coresight/ |
H A D | coresight-self-hosted-trace.h | 18 static inline void write_trfcr(u64 val) argument 20 write_sysreg_s(val, SYS_TRFCR_EL1);
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/linux-master/arch/um/include/shared/ |
H A D | longjmp.h | 12 #define UML_LONGJMP(buf, val) do { \ 13 longjmp(*buf, val); \
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/linux-master/include/net/ |
H A D | inet_dscp.h | 52 static inline bool inet_validate_dscp(__u8 val) argument 54 return !(val & ~INET_DSCP_MASK);
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H A D | dcbevent.h | 20 int call_dcbevent_notifiers(unsigned long val, void *v); 33 static inline int call_dcbevent_notifiers(unsigned long val, void *v) argument
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/linux-master/tools/testing/selftests/bpf/progs/ |
H A D | trace_dummy_st_ops.c | 6 int val = 0; variable 15 /* Read state->val */ 16 bpf_probe_read_kernel(&val, sizeof(__u32), (void *)state);
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H A D | bpf_iter_bpf_array_map.c | 36 __u64 *val = ctx->value; local 38 if (key == (void *)0 || val == (void *)0) 42 bpf_seq_write(ctx->meta->seq, val, sizeof(__u64)); 44 val_sum += *val; 46 /* workaround - It's necessary to do this convoluted (val, key) 48 * bpf_map_update_elem(&hashmap1, val, key, BPF_ANY); 52 bpf_map_update_elem(&hashmap1, val, val, BPF_ANY); 53 hmap_val = bpf_map_lookup_elem(&hashmap1, val); 57 *val [all...] |
/linux-master/sound/soc/amd/rpl/ |
H A D | rpl_acp6x.h | 33 static inline void rpl_acp_writel(u32 val, void __iomem *base_addr) argument 35 writel(val, base_addr - ACP6x_PHY_BASE_ADDRESS);
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/linux-master/arch/x86/include/asm/xen/ |
H A D | events.h | 24 #define xchg_xen_ulong(ptr, val) xchg((ptr), (val))
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/linux-master/drivers/net/ethernet/huawei/hinic/ |
H A D | hinic_hw_if.h | 29 #define HINIC_DMA_ATTR_SET(val, member) \ 30 (((u32)(val) & HINIC_DMA_ATTR_##member##_MASK) << \ 33 #define HINIC_DMA_ATTR_CLEAR(val, member) \ 34 ((val) & (~(HINIC_DMA_ATTR_##member##_MASK \ 50 #define HINIC_FA0_GET(val, member) \ 51 (((val) >> HINIC_FA0_##member##_SHIFT) & HINIC_FA0_##member##_MASK) 70 #define HINIC_FA1_GET(val, member) \ 71 (((val) >> HINIC_FA1_##member##_SHIFT) & HINIC_FA1_##member##_MASK) 76 #define HINIC_FA2_GET(val, member) \ 77 (((val) >> HINIC_FA2 255 hinic_hwif_write_reg(struct hinic_hwif *hwif, u32 reg, u32 val) argument [all...] |
/linux-master/arch/arm/mach-spear/ |
H A D | pl080.c | 25 unsigned char val; member in struct:__anon19 30 unsigned int signal = cd->min_signal, val; local 37 (signals[signal].val != cd->muxval)) { 44 val = readl(DMA_CHN_CFG); 51 val &= ~(0x3 << (signal * 2)); 52 val |= cd->muxval << (signal * 2); 53 writel(val, DMA_CHN_CFG); 57 signals[signal].val = cd->muxval;
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/linux-master/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_gen2_config.c | 18 unsigned long val; local 29 val = i; 32 key, &val, ADF_DEC); 38 key, &val, ADF_DEC); 45 key, &val, ADF_DEC); 50 val = 128; 52 key, &val, ADF_DEC); 56 val = 512; 59 key, &val, ADF_DEC); 63 val 117 unsigned long val; local [all...] |
/linux-master/samples/bpf/ |
H A D | tracex6.bpf.c | 32 u64 count, *val; local 40 val = bpf_map_lookup_elem(&values, &key); 41 if (val) 42 *val = count; 59 struct bpf_perf_event_value *val, buf; local 71 val = bpf_map_lookup_elem(&values2, &key); 72 if (val) 73 *val = buf;
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/linux-master/drivers/thermal/broadcom/ |
H A D | ns-thermal.c | 22 u32 val; local 24 val = readl(pvtmon + PVTMON_CONTROL0); 25 if ((val & PVTMON_CONTROL0_SEL_MASK) != PVTMON_CONTROL0_SEL_TEMP_MONITOR) { 27 val &= ~PVTMON_CONTROL0_SEL_MASK; 30 val |= PVTMON_CONTROL0_SEL_TEMP_MONITOR; 32 writel(val, pvtmon + PVTMON_CONTROL0); 35 val = readl(pvtmon + PVTMON_STATUS); 36 *temp = slope * val + offset;
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/linux-master/drivers/media/platform/qcom/camss/ |
H A D | camss-csid-4-1.c | 173 u32 val; local 194 val = ((CAMSS_CSID_TG_VC_CFG_V_BLANKING & 0xff) << 24) | 196 writel_relaxed(val, csid->base + CAMSS_CSID_TG_VC_CFG); 199 val = ((num_bytes_per_line & 0x1fff) << 16) | 201 writel_relaxed(val, csid->base + CAMSS_CSID_TG_DT_n_CGG_0(0)); 204 val = format->data_type; 205 writel_relaxed(val, csid->base + CAMSS_CSID_TG_DT_n_CGG_1(0)); 208 val = tg->mode - 1; 209 writel_relaxed(val, csid->base + CAMSS_CSID_TG_DT_n_CGG_2(0)); 217 val 254 csid_configure_testgen_pattern(struct csid_device *csid, s32 val) argument [all...] |
/linux-master/arch/mips/boot/compressed/ |
H A D | decompress.h | 12 extern void puthex(unsigned long long val); 16 #define puthex(val) do {} while (0)
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/linux-master/arch/x86/include/asm/ |
H A D | debugreg.h | 26 unsigned long val = 0; /* Damn you, gcc! */ local 30 asm("mov %%db0, %0" :"=r" (val)); 33 asm("mov %%db1, %0" :"=r" (val)); 36 asm("mov %%db2, %0" :"=r" (val)); 39 asm("mov %%db3, %0" :"=r" (val)); 42 asm("mov %%db6, %0" :"=r" (val)); 58 asm volatile("mov %%db7, %0" : "=r" (val) : __FORCE_ORDER); 63 return val;
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/linux-master/drivers/remoteproc/ |
H A D | qcom_q6v5_wcss.c | 157 u32 val; local 161 val = readl(wcss->reg_base + Q6SS_RESET_REG); 162 val |= Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENABLE | Q6SS_STOP_CORE; 163 writel(val, wcss->reg_base + Q6SS_RESET_REG); 166 val = readl(wcss->reg_base + Q6SS_XO_CBCR); 167 val |= 0x1; 168 writel(val, wcss->reg_base + Q6SS_XO_CBCR); 172 val, !(val & BIT(31)), 1, 180 val 296 unsigned long val; local 443 unsigned long val; local 501 unsigned int val; local 532 unsigned long val; local 597 u32 val; local 643 u32 val; local [all...] |
/linux-master/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_guc_slpc.h | 37 int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val); 38 int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val); 39 int intel_guc_slpc_set_boost_freq(struct intel_guc_slpc *slpc, u32 val); 40 int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val); 41 int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val); 43 int intel_guc_slpc_set_media_ratio_mode(struct intel_guc_slpc *slpc, u32 val); 47 int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val); 48 int intel_guc_slpc_set_strategy(struct intel_guc_slpc *slpc, u32 val);
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/linux-master/drivers/soundwire/ |
H A D | amd_init.h | 13 static inline void amd_updatel(void __iomem *mmio, int offset, u32 mask, u32 val) argument 18 tmp = (tmp & ~mask) | val;
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/linux-master/arch/powerpc/platforms/powernv/ |
H A D | vas-window.c | 276 u64 lpcr, val; local 282 val = 0ULL; 283 val = SET_FIELD(VAS_XLATE_MSR_HV, val, 1); 284 val = SET_FIELD(VAS_XLATE_MSR_SF, val, 1); 286 val = SET_FIELD(VAS_XLATE_MSR_DR, val, 1); 287 val = SET_FIELD(VAS_XLATE_MSR_PR, val, 364 u64 val; local 1103 uint64_t val; local 1157 u64 val; local 1212 u64 val; local 1263 u64 val; local 1349 uint64_t val; local [all...] |
/linux-master/drivers/net/phy/mscc/ |
H A D | mscc_ptp.c | 27 static int phy_ts_base_write(struct phy_device *phydev, u32 regnum, u16 val) argument 33 val); 67 u32 val, cnt = 0; local 92 val = phy_ts_base_read(phydev, MSCC_PHY_TS_BIU_ADDR_CNTL); 93 } while (!(val & BIU_ADDR_EXE) && cnt++ < BIU_ADDR_CNT_MAX); 95 val = phy_ts_base_read(phydev, MSCC_PHY_TS_CSR_DATA_MSB); 96 val <<= 16; 97 val |= phy_ts_base_read(phydev, MSCC_PHY_TS_CSR_DATA_LSB); 103 return val; 107 u16 addr, u32 val) 106 vsc85xx_ts_write_csr(struct phy_device *phydev, enum ts_blk blk, u16 addr, u32 val) argument 190 u32 val = 0; local 247 u32 val, ingr_latency, egr_latency; local 346 u32 val; local 513 u32 val; local 543 u32 val; local 575 u32 val; local 616 u32 val; local 651 u32 val; local 702 u32 val; local 749 u32 val; local 783 u32 val; local 810 u32 val; local 854 u32 val; local 885 u32 val = ANA_ETH1_FLOW_ADDR_MATCH2_DEST; local 918 u32 val; local 965 u32 val; local 1035 u32 val; local 1056 u32 val; local 1268 u32 val; local [all...] |
/linux-master/arch/alpha/include/asm/ |
H A D | xchg.h | 18 ____xchg(_u8, volatile char *m, unsigned long val) argument 34 : "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64) 35 : "r" ((long)m), "1" (val) : "memory"); 41 ____xchg(_u16, volatile short *m, unsigned long val) argument 57 : "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64) 58 : "r" ((long)m), "1" (val) : "memory"); 64 ____xchg(_u32, volatile int *m, unsigned long val) argument 76 : "=&r" (val), "=&r" (dummy), "=m" (*m) 77 : "rI" (val), "m" (*m) : "memory"); 79 return val; 83 ____xchg(_u64, volatile long *m, unsigned long val) argument [all...] |
/linux-master/tools/perf/scripts/python/ |
H A D | stat-cpi.py | 23 def store(time, event, cpu, thread, val, ena, run): 24 #print("event %s cpu %d, thread %d, time %d, val %d, ena %d, run %d" % 25 # (event, cpu, thread, time, val, ena, run)) 29 data[key] = [ val, ena, run] 35 def stat__cycles_k(cpu, thread, time, val, ena, run): 36 store(time, "cycles", cpu, thread, val, ena, run); 38 def stat__instructions_k(cpu, thread, time, val, ena, run): 39 store(time, "instructions", cpu, thread, val, ena, run); 41 def stat__cycles_u(cpu, thread, time, val, ena, run): 42 store(time, "cycles", cpu, thread, val, en [all...] |