/linux-master/drivers/scsi/qla2xxx/ |
H A D | qla_tmpl.h | 16 uint32_t count; /* borrow field for running/residual count */ 19 uint32_t template_version; 21 uint32_t template_checksum; 23 uint32_t reserved_2; 26 uint32_t saved_state[16]; 28 uint32_t reserved_3[8]; 69 uint32_t reserved_1; 134 uint32_t num_queues; 140 uint32_t fce_trace_size; 143 uint32_t fce_enable_mb [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
H A D | smu11_driver_if_vangogh.h | 33 uint32_t numFractionalBits; 74 uint32_t MmHubPadding[7]; // SMU internal use 114 uint32_t fclk; 115 uint32_t memclk; 116 uint32_t voltage; 120 uint32_t vclk; 121 uint32_t dclk; 128 uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS]; 129 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; 130 uint32_t DppClock [all...] |
H A D | smu13_driver_if_v13_0_7.h | 377 uint32_t Spare[8]; 378 uint32_t MmHubPadding[8]; // SMU internal use 388 uint32_t eccPadding; 417 uint32_t a; // store in IEEE float format in this variable 418 uint32_t b; // store in IEEE float format in this variable 419 uint32_t c; // store in IEEE float format in this variable 423 uint32_t m; // store in IEEE float format in this variable 424 uint32_t b; // store in IEEE float format in this variable 428 uint32_t a; // store in IEEE float format in this variable 429 uint32_t [all...] |
/linux-master/sound/soc/qcom/qdsp6/ |
H A D | q6apm.h | 60 uint32_t state; 72 uint32_t size; /* size of buffer */ 77 uint32_t num_periods; 78 uint32_t dsp_buf; 79 uint32_t mem_map_handle; 84 uint32_t id; 93 typedef void (*q6apm_cb) (uint32_t opcode, uint32_t token, 98 uint32_t id; 129 int q6apm_write_async(struct q6apm_graph *graph, uint32_t le [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | mpc.h | 263 uint32_t opp_id; 264 uint32_t dpp_id; 265 uint32_t bot_mpcc_id; 266 uint32_t mode; 267 uint32_t alpha_mode; 268 uint32_t pre_multiplied_alpha; 269 uint32_t overlap_only; 270 uint32_t idle; 271 uint32_t busy; 272 uint32_t shaper_lut_mod [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_umc.h | 58 typedef int (*umc_func)(struct amdgpu_device *adev, uint32_t node_inst, 59 uint32_t umc_inst, uint32_t ch_inst, void *data); 81 uint32_t max_ras_err_cnt_per_query; 83 uint32_t channel_inst_num; 85 uint32_t umc_inst_num; 88 uint32_t node_inst_num; 91 uint32_t channel_offs; 93 uint32_t retire_unit; 95 const uint32_t *channel_idx_tb [all...] |
H A D | jpeg_v2_0.h | 53 struct amdgpu_ib *ib, uint32_t flags); 54 void jpeg_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, 55 uint32_t val, uint32_t mask); 58 void jpeg_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val); 59 void jpeg_v2_0_dec_ring_nop(struct amdgpu_ring *ring, uint32_t count);
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H A D | amdgpu_ids.h | 52 uint32_t current_gpu_reset_count; 54 uint32_t gds_base; 55 uint32_t gds_size; 56 uint32_t gws_base; 57 uint32_t gws_size; 58 uint32_t oa_base; 59 uint32_t oa_size;
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H A D | jpeg_v4_0_3.h | 54 uint32_t flags); 59 void jpeg_v4_0_3_dec_ring_nop(struct amdgpu_ring *ring, uint32_t count); 62 void jpeg_v4_0_3_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val); 63 void jpeg_v4_0_3_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, 64 uint32_t val, uint32_t mask);
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H A D | ta_xgmi_if.h | 28 #define RSP_ID(cmdId) (((uint32_t)(cmdId)) | RSP_ID_MASK) 107 uint32_t status; 119 uint32_t num_nodes; 124 uint32_t num_nodes; 129 uint32_t num_nodes; 135 uint32_t num_nodes; 140 uint32_t num_nodes; 161 uint32_t cmd_id; 162 uint32_t resp_id;
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H A D | umc_v8_7.c | 35 const uint32_t 43 static inline uint32_t get_umc_v8_7_reg_offset(struct amdgpu_device *adev, 44 uint32_t umc_inst, 45 uint32_t ch_inst) 51 uint32_t umc_inst, uint32_t ch_inst, 55 uint32_t eccinfo_table_idx; 70 uint32_t umc_inst, uint32_t ch_inst, 74 uint32_t eccinfo_table_id [all...] |
/linux-master/drivers/nfc/nfcmrvl/ |
H A D | fw_dnld.h | 29 uint32_t baudrate; 33 uint32_t clk; 37 uint32_t clk; 41 uint32_t offset; 52 uint32_t magic; 53 uint32_t ref_clock; 54 uint32_t phy;
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/linux-master/drivers/gpu/drm/msm/ |
H A D | msm_ringbuffer.h | 31 volatile uint32_t rptr; 32 volatile uint32_t fence; 34 volatile uint32_t bv_fence; 42 uint32_t ib1_rem, ib2_rem; 49 uint32_t *start, *end, *cur, *next; 69 uint32_t hangcheck_fence; 111 OUT_RING(struct msm_ringbuffer *ring, uint32_t data)
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
H A D | dcn35_pg_cntl.h | 132 PG_CNTL_REG_FIELD_LIST(uint32_t); 133 PG_CNTL_DCN35_REG_FIELD_LIST(uint32_t); 137 uint32_t LONO_STATE; 138 uint32_t DC_IP_REQUEST_CNTL; 139 uint32_t DOMAIN0_PG_CONFIG; 140 uint32_t DOMAIN1_PG_CONFIG; 141 uint32_t DOMAIN2_PG_CONFIG; 142 uint32_t DOMAIN3_PG_CONFIG; 143 uint32_t DOMAIN16_PG_CONFIG; 144 uint32_t DOMAIN17_PG_CONFI [all...] |
/linux-master/arch/mips/include/asm/octeon/ |
H A D | cvmx-bootinfo.h | 59 uint32_t major_version; 60 uint32_t minor_version; 67 uint32_t exception_base_addr; 68 uint32_t stack_size; 69 uint32_t flags; 70 uint32_t core_mask; 72 uint32_t dram_size; 74 uint32_t phy_mem_desc_addr; 76 uint32_t debugger_flags_base_addr; 79 uint32_t eclock_h [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
H A D | dcn30_clk_mgr_smu_msg.c | 54 static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) 56 const uint32_t initial_max_retries = max_retries; 57 uint32_t reg = 0; 77 static bool dcn30_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32_t param_in, uint32_t *param_out) 79 uint32_t result; 112 bool dcn30_smu_test_message(struct clk_mgr_internal *clk_mgr, uint32_t input) 114 uint32_t response = 0; 144 uint32_t respons [all...] |
/linux-master/drivers/scsi/ |
H A D | ips.h | 413 uint32_t lba; 414 uint32_t sg_addr; 418 uint32_t ccsar; 419 uint32_t cccr; 426 uint32_t reserved2; 427 uint32_t buffer_addr; 428 uint32_t reserved3; 429 uint32_t ccsar; 430 uint32_t cccr; 438 uint32_t reserved [all...] |
/linux-master/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | smumgr.h | 88 extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp); 91 uint16_t msg, uint32_t parameter, 92 uint32_t *resp); 96 extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type); 104 extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, 105 uint32_t type, uint32_t member); 106 extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);
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/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_edp_panel_control.h | 36 uint32_t *backlight_millinits_avg, 37 uint32_t *backlight_millinits_peak); 39 uint32_t backlight_pwm_u16_16, 40 uint32_t frame_ramp); 43 uint32_t backlight_millinits, 44 uint32_t transition_time_in_ms); 54 void edp_get_psr_residency(const struct dc_link *link, uint32_t *residency); 62 bool edp_set_coasting_vtotal(struct dc_link *link, uint32_t coasting_vtotal); 67 const unsigned int *power_opts, uint32_t coasting_vtotal);
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/linux-master/drivers/gpu/drm/amd/display/dc/ |
H A D | dc_types.h | 153 uint32_t length; 187 uint32_t serial_number; 194 uint32_t audio_mode_count; 196 uint32_t audio_latency; 197 uint32_t video_latency; 202 uint32_t max_tmds_clk_mhz; 215 uint32_t INTERLACE :1; 217 uint32_t NATIVE :1; 219 uint32_t PREFERRED :1; 222 uint32_t REDUCED_BLANKIN [all...] |
H A D | dc.h | 95 uint32_t per_pixel_alpha : 1; 97 uint32_t argb8888 : 1; 98 uint32_t nv12 : 1; 99 uint32_t fp16 : 1; 100 uint32_t p010 : 1; 101 uint32_t ayuv : 1; 107 uint32_t argb8888; 108 uint32_t nv12; 109 uint32_t fp16; 115 uint32_t argb888 [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/bios/ |
H A D | bios_parser_types_internal.h | 33 uint32_t major; 34 uint32_t minor; 57 uint32_t object_info_tbl_offset;
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H A D | bios_parser_types_internal2.h | 35 uint32_t major; 36 uint32_t minor; 59 uint32_t object_info_tbl_offset;
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/linux-master/drivers/staging/media/atomisp/pci/runtime/bufq/interface/ |
H A D | ia_css_bufq.h | 87 uint32_t item); 100 uint32_t *item); 160 uint32_t item);
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/linux-master/tools/testing/selftests/powerpc/math/ |
H A D | mma.c | 12 extern void test_mma(uint16_t (*)[8], uint16_t (*)[8], uint32_t (*)[4*4]); 20 uint32_t z[4*4]; 21 uint32_t exp[4*4] = {1, 2, 3, 4,
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