Searched refs:reg_val (Results 126 - 150 of 396) sorted by relevance

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/linux-master/drivers/iio/resolver/
H A Dad2s1210.c460 unsigned int reg_val; local
483 ret = regmap_read(st->regmap, AD2S1210_REG_FAULT, &reg_val);
487 st->sample.fault = reg_val;
602 unsigned int reg_val; local
606 ret = regmap_read(st->regmap, reg, &reg_val);
610 *val = reg_val * THRESHOLD_MILLIVOLT_PER_LSB;
617 unsigned int reg_val; local
619 reg_val = val / THRESHOLD_MILLIVOLT_PER_LSB;
622 return regmap_write(st->regmap, reg, reg_val);
628 unsigned int reg_val; local
701 unsigned int reg_val, hysteresis; local
722 unsigned int reg_val; local
1333 unsigned int reg_val; local
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/linux-master/drivers/input/misc/
H A Datc260x-onkey.c78 u32 reg_bm, reg_val; local
86 reg_val = reg_bm | press_time;
94 reg_val |= onkey->params->reset_en_bm | reset_time;
98 onkey->params->reg_int_ctl, reg_bm, reg_val);
/linux-master/drivers/net/ethernet/cavium/liquidio/
H A Docteon_device.c969 u64 reg_val = octeon_read_csr64( local
972 while ((reg_val & CN23XX_PKT_INPUT_CTL_RST) &&
973 !(reg_val & CN23XX_PKT_INPUT_CTL_QUIET) &&
975 reg_val = octeon_read_csr64(
986 reg_val = reg_val & ~CN23XX_PKT_INPUT_CTL_RST;
989 reg_val);
991 reg_val = octeon_read_csr64(
993 if (reg_val & CN23XX_PKT_INPUT_CTL_RST) {
1008 u32 reg_val local
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/linux-master/sound/soc/fsl/
H A Dfsl_audmix.c118 unsigned int reg_val, val, mix_clk; local
121 reg_val = snd_soc_component_read(comp, FSL_AUDMIX_CTR);
122 mix_clk = ((reg_val & FSL_AUDMIX_CTR_MIXCLK_MASK)
157 unsigned int reg_val, val, mask = 0, ctr = 0; local
161 reg_val = snd_soc_component_read(comp, FSL_AUDMIX_CTR);
164 out_src = ((reg_val & FSL_AUDMIX_CTR_OUTSRC_MASK)
166 mix_clk = ((reg_val & FSL_AUDMIX_CTR_MIXCLK_MASK)
/linux-master/drivers/media/i2c/
H A Dlm3560.c169 unsigned int reg_val; local
170 rval = regmap_read(flash->regmap, REG_FLAG, &reg_val);
173 if (reg_val & FAULT_SHORT_CIRCUIT)
175 if (reg_val & FAULT_OVERTEMP)
177 if (reg_val & FAULT_TIMEOUT)
377 unsigned int reg_val; local
390 rval = regmap_read(flash->regmap, REG_FLAG, &reg_val);
/linux-master/drivers/net/ethernet/hisilicon/
H A Dhns_mdio.c317 u16 reg_val; local
341 reg_val = MDIO_GET_REG_BIT(mdio_dev, MDIO_STA_REG, MDIO_STATE_STA_B);
342 if (reg_val) {
348 reg_val = (u16)MDIO_GET_REG_FIELD(mdio_dev, MDIO_RDATA_REG,
351 return reg_val;
368 u16 reg_val; local
406 reg_val = MDIO_GET_REG_BIT(mdio_dev, MDIO_STA_REG, MDIO_STATE_STA_B);
407 if (reg_val) {
413 reg_val = (u16)MDIO_GET_REG_FIELD(mdio_dev, MDIO_RDATA_REG,
416 return reg_val;
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/linux-master/drivers/hwmon/
H A Daspeed-g6-pwm-tach.c319 u32 reg_val; local
326 reg_val = readl(priv->base + TACH_ASPEED_CTRL(channel));
327 reg_val = FIELD_GET(TACH_ASPEED_CLK_DIV_T_MASK, reg_val);
328 *val = BIT(reg_val << 1);
341 u32 reg_val; local
349 reg_val = readl(priv->base + TACH_ASPEED_CTRL(channel));
350 reg_val &= ~TACH_ASPEED_CLK_DIV_T_MASK;
351 reg_val |= FIELD_PREP(TACH_ASPEED_CLK_DIV_T_MASK,
353 writel(reg_val, pri
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/linux-master/arch/powerpc/platforms/pseries/
H A Drtas-fadump.c307 static void __init rtas_fadump_set_regval(struct pt_regs *regs, u64 reg_id, u64 reg_val) argument
313 regs->gpr[i] = (unsigned long)reg_val;
315 regs->nip = (unsigned long)reg_val;
317 regs->msr = (unsigned long)reg_val;
319 regs->ctr = (unsigned long)reg_val;
321 regs->link = (unsigned long)reg_val;
323 regs->xer = (unsigned long)reg_val;
325 regs->ccr = (unsigned long)reg_val;
327 regs->dar = (unsigned long)reg_val;
329 regs->dsisr = (unsigned long)reg_val;
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/linux-master/drivers/media/tuners/
H A Dmxl301rf.c137 struct reg_val { struct
142 static const struct reg_val set_idac[] = {
155 struct reg_val tune0[] = {
165 struct reg_val tune1[] = {
229 static const struct reg_val standby_data[] = {
/linux-master/drivers/video/backlight/
H A Dmp3309c.c89 u8 reg_val; local
103 reg_val = 0x00;
105 reg_val |= REG_I2C_1_SYNC;
106 reg_val |= chip->pdata->over_voltage_protection;
107 ret = regmap_write(chip->regmap, REG_I2C_1, reg_val);
H A Dadp5520_bl.c75 uint8_t reg_val; local
77 error = adp5520_read(data->master, ADP5520_BL_VALUE, &reg_val);
79 return error ? data->current_brightness : reg_val;
139 uint8_t reg_val; local
142 ret = adp5520_read(data->master, reg, &reg_val);
148 return sprintf(buf, "%u\n", reg_val);
/linux-master/drivers/i2c/busses/
H A Di2c-xiic.c375 u32 reg_val; local
410 reg_val = (DIV_ROUND_UP(i2c->input_clk, 2 * i2c->i2c_clk)) - 7;
411 if (reg_val == 0)
414 xiic_setreg32(i2c, XIIC_THIGH_REG_OFFSET, reg_val - 1);
417 xiic_setreg32(i2c, XIIC_TLOW_REG_OFFSET, reg_val - 1);
420 reg_val = (timing_reg_values[index].tsusta * clk_in_mhz) / 1000;
421 xiic_setreg32(i2c, XIIC_TSUSTA_REG_OFFSET, reg_val - 1);
424 reg_val = (timing_reg_values[index].tsusto * clk_in_mhz) / 1000;
425 xiic_setreg32(i2c, XIIC_TSUSTO_REG_OFFSET, reg_val - 1);
428 reg_val
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/linux-master/drivers/net/ethernet/amd/
H A Damd8111e.c102 unsigned int reg_val; local
105 reg_val = readl(mmio + PHY_ACCESS);
106 while (reg_val & PHY_CMD_ACTIVE)
107 reg_val = readl(mmio + PHY_ACCESS);
112 reg_val = readl(mmio + PHY_ACCESS);
114 } while (--repeat && (reg_val & PHY_CMD_ACTIVE));
115 if (reg_val & PHY_RD_ERR)
118 *val = reg_val & 0xffff;
132 unsigned int reg_val; local
134 reg_val
160 unsigned int reg_val; local
425 int i, reg_val; local
500 unsigned int reg_val; local
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/linux-master/drivers/net/ethernet/intel/ixgbevf/
H A Dvf.c161 u32 reg_val; local
172 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
173 if (reg_val & IXGBE_RXDCTL_ENABLE) {
174 reg_val &= ~IXGBE_RXDCTL_ENABLE;
175 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
190 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
191 if (reg_val & IXGBE_TXDCTL_ENABLE) {
192 reg_val &= ~IXGBE_TXDCTL_ENABLE;
193 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
/linux-master/drivers/clk/
H A Dclk-axi-clkgen.c261 unsigned int reg_val; local
268 reg_val = AXI_CLKGEN_V2_DRP_CNTRL_SEL | AXI_CLKGEN_V2_DRP_CNTRL_READ;
269 reg_val |= (reg << 16);
271 axi_clkgen_write(axi_clkgen, AXI_CLKGEN_V2_REG_DRP_CNTRL, reg_val);
285 unsigned int reg_val = 0; local
293 axi_clkgen_mmcm_read(axi_clkgen, reg, &reg_val);
294 reg_val &= ~mask;
297 reg_val |= AXI_CLKGEN_V2_DRP_CNTRL_SEL | (reg << 16) | (val & mask);
299 axi_clkgen_write(axi_clkgen, AXI_CLKGEN_V2_REG_DRP_CNTRL, reg_val);
/linux-master/drivers/net/ethernet/chelsio/cxgb3/
H A Dael1002.c77 struct reg_val { struct
84 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
295 static const struct reg_val regs[] = {
327 static const struct reg_val regs[] = {
331 static const struct reg_val preemphasis[] = {
396 static const struct reg_val regs0[] = {
406 static const struct reg_val regs1[] = {
525 static const struct reg_val regs[] = {
554 static const struct reg_val uCclock40MHz[] = {
561 static const struct reg_val uCclockActivat
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/linux-master/drivers/ata/
H A Dahci_imx.c754 u32 reg_val; local
775 reg_val = readl(mmio + IMX_P0PHYCR);
776 writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR);
1056 unsigned int reg_val; local
1151 reg_val = readl(hpriv->mmio + HOST_CAP);
1152 if (!(reg_val & HOST_CAP_SSS)) {
1153 reg_val |= HOST_CAP_SSS;
1154 writel(reg_val, hpriv->mmio + HOST_CAP);
1156 reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);
1157 if (!(reg_val
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/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_irq.c382 uint32_t reg_val = 0; local
386 reg_val = REG_READ(pipeconf_reg);
390 if (!(reg_val & PIPEACONF_ENABLE))
440 uint32_t reg_val = 0; local
464 reg_val = REG_READ(pipeconf_reg);
466 if (!(reg_val & PIPEACONF_ENABLE)) {
/linux-master/drivers/net/wireless/ath/ath10k/
H A Dbmi.c196 int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val) argument
204 address, reg_val);
213 cmd.write_soc_reg.value = __cpu_to_le32(reg_val);
225 int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val) argument
251 *reg_val = __le32_to_cpu(resp.read_soc_reg.value);
254 *reg_val);
/linux-master/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_ethtool.c367 u32 reg_val = 0; local
384 reg_val = SXGBE_CORE_RSS_CTL_TCP4TE;
393 reg_val = SXGBE_CORE_RSS_CTL_UDP4TE;
410 reg_val = SXGBE_CORE_RSS_CTL_IP2TE;
417 reg_val |= readl(priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
418 writel(reg_val, priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
/linux-master/drivers/video/fbdev/via/
H A Dviafbdev.c1133 u8 reg_val = 0; local
1145 if (kstrtou8(value, 0, &reg_val) < 0)
1147 DEBUG_MSG(KERN_INFO "DVP0:reg_val[%lu]=:%x\n", i,
1148 reg_val);
1152 reg_val, 0x0f);
1156 reg_val << 4, BIT5);
1158 reg_val << 1, BIT1);
1162 reg_val << 3, BIT4);
1164 reg_val << 2, BIT2);
1203 u8 reg_val local
1265 u8 reg_val; local
1299 u8 reg_val; local
1357 struct IODATA reg_val; local
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/linux-master/drivers/media/dvb-frontends/
H A Dtc90522.c40 struct reg_val { struct
46 reg_write(struct tc90522_state *state, const struct reg_val *regs, int num)
100 struct reg_val set_tsid[] = {
112 struct reg_val rv;
474 static const struct reg_val reset_sat = { 0x03, 0x01 };
475 static const struct reg_val reset_ter = { 0x01, 0x40 };
530 struct reg_val agc_sat[] = {
536 struct reg_val agc_ter[] = {
542 struct reg_val *rv;
562 static const struct reg_val sleep_sa
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/linux-master/sound/soc/codecs/
H A Dda9055.c449 static int da9055_get_alc_data(struct snd_soc_component *component, u8 reg_val) argument
458 snd_soc_component_write(component, DA9055_ALC_CIC_OP_LVL_CTRL, reg_val);
462 reg_val | DA9055_ALC_DATA_MIDDLE);
467 reg_val | DA9055_ALC_DATA_TOP);
480 u8 reg_val, adc_left, adc_right, mic_left, mic_right; local
521 reg_val = (offset_l & DA9055_ALC_OFFSET_15_8) >> 8;
522 snd_soc_component_write(component, DA9055_ALC_OFFSET_OP2M_L, reg_val);
523 reg_val = (offset_l & DA9055_ALC_OFFSET_17_16) >> 16;
524 snd_soc_component_write(component, DA9055_ALC_OFFSET_OP2U_L, reg_val);
526 reg_val
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/linux-master/drivers/media/usb/as102/
H A Das10x_cmd_cfg.c63 *pvalue = le32_to_cpu((__force __le32)prsp->body.context.rsp.reg_val.u.value32);
94 /* pcmd->body.context.req.reg_val.mode initialization is not required */
95 pcmd->body.context.req.reg_val.u.value32 = (__force u32)cpu_to_le32(value);
/linux-master/include/linux/mfd/da9052/
H A Dda9052.h186 unsigned char reg_val)
190 ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
184 da9052_reg_update(struct da9052 *da9052, unsigned char reg, unsigned char bit_mask, unsigned char reg_val) argument

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