/linux-master/arch/powerpc/boot/dts/fsl/ |
H A D | p1023si-post.dtsi | 68 reg = <0 0 0 0 0>; 87 reg = <0 0 0 0 0>; 106 reg = <0 0 0 0 0>; 122 reg = <0x0 0x4000>, <0x100000 0x1000>; 128 reg = <0x4000 0x4000>, <0x101000 0x1000>; 134 reg = <0x8000 0x4000>, <0x102000 0x1000>; 147 reg = <0x0 0x4000>, <0x100000 0x1000>; 152 reg = <0x4000 0x4000>, <0x101000 0x1000>; 157 reg = <0x8000 0x4000>, <0x102000 0x1000>; 171 reg [all...] |
/linux-master/drivers/net/ethernet/ti/ |
H A D | netcp_sgmii.c | 31 static void sgmii_write_reg(void __iomem *base, int reg, u32 val) argument 33 writel(val, base + reg); 36 static u32 sgmii_read_reg(void __iomem *base, int reg) argument 38 return readl(base + reg); 41 static void sgmii_write_reg_bit(void __iomem *base, int reg, u32 val) argument 43 writel((readl(base + reg) | val), base + reg); 63 u32 reg; local 67 reg = sgmii_read_reg(sgmii_ofs, SGMII_SRESET_REG(port)); 68 oldval = (reg [all...] |
/linux-master/sound/pci/ac97/ |
H A D | ac97_patch.h | 10 #define AC97_SINGLE_VALUE(reg,shift,mask,invert) \ 11 ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | \ 13 #define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) \ 14 (AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26)) 15 #define AC97_SINGLE(xname, reg, shift, mask, invert) \ 19 .private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) } 20 #define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \ 24 .private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) } 25 #define AC97_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ 29 .private_value = (reg) | ((shift_lef 33 unsigned char reg; member in struct:ac97_enum [all...] |
/linux-master/drivers/clk/rockchip/ |
H A D | clk-inverter.c | 15 void __iomem *reg; member in struct:rockchip_inv_clock 30 val = readl(inv_clock->reg) >> inv_clock->shift; 50 inv_clock->reg); 53 u32 reg; local 57 reg = readl(inv_clock->reg); 58 reg &= ~BIT(inv_clock->shift); 59 reg |= val; 60 writel(reg, inv_clock->reg); 73 rockchip_clk_register_inverter(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *reg, int shift, int flags, spinlock_t *lock) argument [all...] |
/linux-master/net/netfilter/ |
H A D | nf_sockopt.c | 25 int nf_register_sockopt(struct nf_sockopt_ops *reg) argument 32 if (ops->pf == reg->pf 34 reg->set_optmin, reg->set_optmax) 36 reg->get_optmin, reg->get_optmax))) { 40 reg->set_optmin, reg->set_optmax, 41 reg->get_optmin, reg 54 nf_unregister_sockopt(struct nf_sockopt_ops *reg) argument [all...] |
/linux-master/arch/mips/bcm63xx/ |
H A D | gpio.c | 41 u32 reg; local 49 reg = gpio_out_low_reg; 53 reg = GPIO_DATA_HI_REG; 63 bcm_gpio_writel(*v, reg); 69 u32 reg; local 75 reg = gpio_out_low_reg; 78 reg = GPIO_DATA_HI_REG; 82 return !!(bcm_gpio_readl(reg) & mask); 88 u32 reg; local 96 reg [all...] |
/linux-master/drivers/clk/mmp/ |
H A D | pwr-island.c | 18 void __iomem *reg; member in struct:mmp_pm_domain 35 val = readl(pm_domain->reg); 39 writel(val, pm_domain->reg); 43 writel(val, pm_domain->reg); 50 writel(val, pm_domain->reg); 53 writel(val, pm_domain->reg); 56 writel(val, pm_domain->reg); 58 writel(after_power_on, pm_domain->reg); 80 val = readl(pm_domain->reg); 83 writel(val, pm_domain->reg); 91 mmp_pm_domain_register(const char *name, void __iomem *reg, u32 power_on, u32 reset, u32 clock_enable, unsigned int flags, spinlock_t *lock) argument [all...] |
/linux-master/drivers/media/i2c/ |
H A D | cs3308.c | 23 static inline int cs3308_write(struct v4l2_subdev *sd, u8 reg, u8 value) argument 27 return i2c_smbus_write_byte_data(client, reg, value); 30 static inline int cs3308_read(struct v4l2_subdev *sd, u8 reg) argument 34 return i2c_smbus_read_byte_data(client, reg); 38 static int cs3308_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) argument 40 reg->val = cs3308_read(sd, reg->reg & 0xffff); 41 reg->size = 1; 45 static int cs3308_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) argument [all...] |
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | common_baco.c | 27 static bool baco_wait_register(struct pp_hwmgr *hwmgr, u32 reg, u32 mask, u32 value) argument 34 data = RREG32(reg); 44 static bool baco_cmd_handler(struct pp_hwmgr *hwmgr, u32 command, u32 reg, u32 mask, argument 53 WREG32(reg, value << shift); 56 data = RREG32(reg); 58 WREG32(reg, data); 61 ret = baco_wait_register(hwmgr, reg, mask, value); 86 u32 i, reg = 0; local 92 reg = entry[i].reg_offset; 93 if (!baco_cmd_handler(hwmgr, entry[i].cmd, reg, entr 106 u32 i, reg = 0; local [all...] |
/linux-master/drivers/media/tuners/ |
H A D | fc0012.c | 11 static int fc0012_writereg(struct fc0012_priv *priv, u8 reg, u8 val) argument 13 u8 buf[2] = {reg, val}; 20 "%s: I2C write reg failed, reg: %02x, val: %02x\n", 21 KBUILD_MODNAME, reg, val); 27 static int fc0012_readreg(struct fc0012_priv *priv, u8 reg, u8 *val) argument 31 .buf = ®, .len = 1 }, 38 "%s: I2C read reg failed, reg: %02x\n", 39 KBUILD_MODNAME, reg); 55 unsigned char reg[] = { local 125 unsigned char reg[7], am, pm, multi, tmp; local [all...] |
/linux-master/drivers/phy/marvell/ |
H A D | phy-mvebu-cp110-utmi.c | 111 u32 reg; local 121 reg = readl(PORT_REGS(port) + UTMI_PLL_CTRL_REG); 122 reg &= ~(PLL_REFDIV_MASK | PLL_FBDIV_MASK | PLL_SEL_LPFR_MASK); 123 reg |= (PLL_REFDIV_VAL << PLL_REFDIV_OFFSET) | 125 writel(reg, PORT_REGS(port) + UTMI_PLL_CTRL_REG); 128 reg = readl(PORT_REGS(port) + UTMI_CAL_CTRL_REG); 129 reg &= ~IMPCAL_VTH_MASK; 130 reg |= IMPCAL_VTH_VAL << IMPCAL_VTH_OFFSET; 131 writel(reg, PORT_REGS(port) + UTMI_CAL_CTRL_REG); 134 reg 195 u32 reg; local [all...] |
/linux-master/include/linux/iio/imu/ |
H A D | adis.h | 17 #define ADIS_WRITE_REG(reg) ((0x80 | (reg))) 18 #define ADIS_READ_REG(reg) ((reg) & 0x7f) 49 * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg 160 int __adis_write_reg(struct adis *adis, unsigned int reg, 162 int __adis_read_reg(struct adis *adis, unsigned int reg, 168 * @reg: The address of the register to be written 171 static inline int __adis_write_reg_8(struct adis *adis, unsigned int reg, argument 174 return __adis_write_reg(adis, reg, va 183 __adis_write_reg_16(struct adis *adis, unsigned int reg, u16 val) argument 195 __adis_write_reg_32(struct adis *adis, unsigned int reg, u32 val) argument 207 __adis_read_reg_16(struct adis *adis, unsigned int reg, u16 *val) argument 226 __adis_read_reg_32(struct adis *adis, unsigned int reg, u32 *val) argument 246 adis_write_reg(struct adis *adis, unsigned int reg, unsigned int val, unsigned int size) argument 265 adis_read_reg(struct adis *adis, unsigned int reg, unsigned int *val, unsigned int size) argument 283 adis_write_reg_8(struct adis *adis, unsigned int reg, u8 val) argument 295 adis_write_reg_16(struct adis *adis, unsigned int reg, u16 val) argument 307 adis_write_reg_32(struct adis *adis, unsigned int reg, u32 val) argument 319 adis_read_reg_16(struct adis *adis, unsigned int reg, u16 *val) argument 338 adis_read_reg_32(struct adis *adis, unsigned int reg, u32 *val) argument 363 adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask, const u32 val, u8 size) argument [all...] |
/linux-master/sound/firewire/motu/ |
H A D | motu-protocol-v2.c | 48 __be32 reg; local 51 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, ®, 52 sizeof(reg)); 56 return get_clock_rate(be32_to_cpu(reg), rate); 62 __be32 reg; local 74 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, ®, 75 sizeof(reg)); 78 data = be32_to_cpu(reg); 83 reg = cpu_to_be32(data); 84 return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, ®, 108 __be32 reg; local 148 __be32 reg; local 200 __be32 reg; local 230 __be32 reg; local [all...] |
/linux-master/drivers/clk/imx/ |
H A D | clk-composite-93.c | 33 static int imx93_clk_composite_wait_ready(struct clk_hw *hw, void __iomem *reg) argument 38 ret = readl_poll_timeout_atomic(reg + STAT_OFFSET, val, !(val & BIT(CCM_BUSY_SHIFT)), 50 u32 reg; local 55 reg = readl(gate->reg); 58 reg &= ~BIT(gate->bit_idx); 60 reg |= BIT(gate->bit_idx); 62 writel(reg, gate->reg); 64 imx93_clk_composite_wait_ready(hw, gate->reg); 152 u32 reg; local 184 imx93_clk_composite_flags(const char *name, const char * const *parent_names, int num_parents, void __iomem *reg, u32 domain_id, unsigned long flags) argument [all...] |
/linux-master/drivers/net/ipa/ |
H A D | ipa_main.c | 198 const struct reg *reg; local 205 reg = ipa_reg(ipa, IPA_BCR); 207 iowrite32(val, ipa->reg_virt + reg_offset(reg)); 213 const struct reg *reg; local 221 reg = ipa_reg(ipa, IPA_TX_CFG); 222 offset = reg_offset(reg); 226 val &= ~reg_bit(reg, PA_MASK_EN); 234 const struct reg *re local 260 const struct reg *reg; local 295 const struct reg *reg; local 362 const struct reg *reg; local 413 const struct reg *reg; local 432 const struct reg *reg; local 455 const struct reg *reg; local [all...] |
/linux-master/drivers/phy/broadcom/ |
H A D | phy-brcm-usb-init-synopsys.c | 163 u32 reg; local 168 orig_reg = reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP)); 171 reg &= ~(USB_CTRL_MASK(SETUP, STRAP_IPP_SEL)); 174 reg &= ~(USB_CTRL_MASK(SETUP, IPP) | USB_CTRL_MASK(SETUP, IOC)); 176 reg |= USB_CTRL_MASK(SETUP, IOC); 178 reg |= USB_CTRL_MASK(SETUP, IPP); 179 brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP)); 185 if ((reg ^ orig_reg) & USB_CTRL_MASK(SETUP, IPP)) 199 u32 reg; local 205 reg 249 u32 reg; local 364 u32 reg; local 395 u32 reg = 0; local 407 u32 reg; local [all...] |
/linux-master/drivers/net/wireless/ralink/rt2x00/ |
H A D | rt73usb.c | 55 u32 reg; local 63 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 64 reg = 0; 65 rt2x00_set_field32(®, PHY_CSR3_VALUE, value); 66 rt2x00_set_field32(®, PHY_CSR3_REGNUM, word); 67 rt2x00_set_field32(®, PHY_CSR3_BUSY, 1); 68 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0); 70 rt2x00usb_register_write_lock(rt2x00dev, PHY_CSR3, reg); 79 u32 reg; local 89 * doesn't become available in time, reg wil 113 u32 reg; local 178 u32 reg; local 231 u32 reg; local 263 u32 reg; local 360 u32 reg; local 460 u32 reg; local 494 u32 reg; local 528 u32 reg; local 690 u32 reg; local 802 u32 reg; local 821 u32 reg; local 878 u32 reg; local 1016 u32 reg; local 1039 u32 reg; local 1101 u32 reg; local 1143 u32 reg; local 1379 u32 reg, reg2; local 1527 u32 orig_reg, reg; local 1592 u32 orig_reg, reg; local 1846 u32 reg; local 2166 u32 reg; local 2229 u32 reg; local 2283 u32 reg; local [all...] |
H A D | rt61pci.c | 57 u32 reg; local 65 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 66 reg = 0; 67 rt2x00_set_field32(®, PHY_CSR3_VALUE, value); 68 rt2x00_set_field32(®, PHY_CSR3_REGNUM, word); 69 rt2x00_set_field32(®, PHY_CSR3_BUSY, 1); 70 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0); 72 rt2x00mmio_register_write(rt2x00dev, PHY_CSR3, reg); 81 u32 reg; local 91 * doesn't become available in time, reg wil 115 u32 reg; local 141 u32 reg; local 169 u32 reg; local 184 u32 reg = 0; local 233 u32 reg; local 284 u32 reg; local 328 u32 reg; local 425 u32 reg; local 459 u32 reg; local 494 u32 reg; local 620 u32 reg; local 709 u32 reg; local 834 u32 reg; local 853 u32 reg; local 918 u32 reg; local 1044 u32 reg; local 1067 u32 reg; local 1098 u32 reg; local 1203 u32 reg; local 1330 u32 reg; local 1411 u32 reg; local 1624 u32 reg; local 1680 u32 reg; local 1710 u32 reg, reg2; local 1879 u32 orig_reg, reg; local 1940 u32 orig_reg, reg; local 2067 u32 reg; local 2160 u32 reg; local 2178 u32 reg; local 2236 u32 reg, mask; local 2302 u32 reg; local 2409 u32 reg; local 2742 u32 reg; local 2810 u32 reg; local 2864 u32 reg; local [all...] |
/linux-master/drivers/clk/mvebu/ |
H A D | clk-corediv.c | 56 void __iomem *reg; member in struct:clk_corediv 86 return !!(readl(corediv->reg) & enable_mask); 95 u32 reg; local 99 reg = readl(corediv->reg); 100 reg |= (BIT(desc->fieldbit) << soc_desc->enable_bit_offset); 101 writel(reg, corediv->reg); 114 u32 reg; local 118 reg 131 u32 reg, div; local 160 u32 reg, div; local [all...] |
/linux-master/sound/soc/tegra/ |
H A D | tegra210_admaif.c | 20 #define CH_REG(offset, reg, id) \ 21 ((offset) + (reg) + (TEGRA_ADMAIF_CHANNEL_REG_STRIDE * (id))) 23 #define CH_TX_REG(reg, id) CH_REG(admaif->soc_data->tx_base, reg, id) 25 #define CH_RX_REG(reg, id) CH_REG(admaif->soc_data->rx_base, reg, id) 80 static bool tegra_admaif_wr_reg(struct device *dev, unsigned int reg) argument 92 if ((reg >= rx_base) && (reg < rx_max)) { 93 reg 114 tegra_admaif_rd_reg(struct device *dev, unsigned int reg) argument 158 tegra_admaif_volatile_reg(struct device *dev, unsigned int reg) argument 242 tegra_admaif_set_pack_mode(struct regmap *map, unsigned int reg, int valid_bit) argument 272 unsigned int reg, path; local 323 unsigned int reg, mask, val; local [all...] |
/linux-master/drivers/phy/samsung/ |
H A D | phy-exynos5-usbdrd.c | 253 static unsigned int exynos5_rate_to_clk(unsigned long rate, u32 *reg) argument 259 *reg = EXYNOS5_FSEL_9MHZ6; 262 *reg = EXYNOS5_FSEL_10MHZ; 265 *reg = EXYNOS5_FSEL_12MHZ; 268 *reg = EXYNOS5_FSEL_19MHZ2; 271 *reg = EXYNOS5_FSEL_20MHZ; 274 *reg = EXYNOS5_FSEL_24MHZ; 277 *reg = EXYNOS5_FSEL_26MHZ; 280 *reg = EXYNOS5_FSEL_50MHZ; 311 u32 reg; local 357 u32 reg; local 376 u32 reg; local 391 u32 reg; local 416 u32 reg; local 478 u32 reg; local 750 u32 reg; local 831 u32 reg; local [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/bus/ |
H A D | hwsq.h | 86 hwsq_rd32(struct hwsq *ram, struct hwsq_reg *reg) argument 89 if (reg->sequence != ram->sequence) 90 reg->data = nvkm_rd32(device, reg->addr); 91 return reg->data; 95 hwsq_wr32(struct hwsq *ram, struct hwsq_reg *reg, u32 data) argument 99 reg->sequence = ram->sequence; 100 reg->data = data; 102 for (mask = reg->mask; mask > 0; mask = (mask & ~1) >> 1) { 104 nvkm_hwsq_wr32(ram->hwsq, reg 111 hwsq_nuke(struct hwsq *ram, struct hwsq_reg *reg) argument 117 hwsq_mask(struct hwsq *ram, struct hwsq_reg *reg, u32 mask, u32 data) argument [all...] |
/linux-master/arch/powerpc/kvm/ |
H A D | book3s_hv.h | 68 #define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_SET(reg, size, iden) \ 69 static inline void kvmppc_set_##reg ##_hv(struct kvm_vcpu *vcpu, u##size val) \ 71 vcpu->arch.reg = val; \ 75 #define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_GET(reg, size, iden) \ 76 static inline u##size kvmppc_get_##reg ##_hv(struct kvm_vcpu *vcpu) \ 79 return vcpu->arch.reg; \ 82 #define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(reg, size, iden) \ 83 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_SET(reg, size, iden) \ 84 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_GET(reg, size, iden) \ 86 #define KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_SET(reg, siz [all...] |
/linux-master/drivers/net/dsa/ |
H A D | lan9303_mdio.c | 16 /* Generate phy-addr and -reg from the input address */ 25 static void lan9303_mdio_real_write(struct mdio_device *mdio, int reg, u16 val) argument 27 mdio->bus->write(mdio->bus, PHY_ADDR(reg), PHY_REG(reg), val); 30 static int lan9303_mdio_write(void *ctx, uint32_t reg, uint32_t val) argument 34 reg <<= 2; /* reg num to offset */ 36 lan9303_mdio_real_write(sw_dev->device, reg, val & 0xffff); 37 lan9303_mdio_real_write(sw_dev->device, reg + 2, (val >> 16) & 0xffff); 43 static u16 lan9303_mdio_real_read(struct mdio_device *mdio, int reg) argument 48 lan9303_mdio_read(void *ctx, uint32_t reg, uint32_t *val) argument 61 lan9303_mdio_phy_write(struct lan9303 *chip, int phy, int reg, u16 val) argument 69 lan9303_mdio_phy_read(struct lan9303 *chip, int phy, int reg) argument [all...] |
/linux-master/drivers/acpi/riscv/ |
H A D | cppc.c | 30 u32 reg; member in struct:sbi_cppc_data 56 data->reg, 0, 0, 0, 0, 0); 64 data->reg, data->val, 0, 0, 0, 0); 71 switch (data->reg) { 99 int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val) argument 106 if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_SBI) { 110 data.reg = FFH_CPPC_SBI_REG(reg->address); 117 } else if (FFH_CPPC_TYPE(reg->address) == FFH_CPPC_CSR) { 118 data.reg 130 cpc_write_ffh(int cpu, struct cpc_reg *reg, u64 val) argument [all...] |