/linux-master/drivers/hwmon/ |
H A D | lm75.h | 34 static inline int LM75_TEMP_FROM_REG(u16 reg) argument 40 return ((s16)reg / 128) * 500;
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/linux-master/arch/powerpc/boot/ |
H A D | ppc_asm.h | 88 #define LOAD_REG_ADDR(reg,name) \ 89 addis reg,r2,name@toc@ha; \ 90 addi reg,reg,name@toc@l 92 #define LOAD_REG_ADDR(reg,name) \ 93 lis reg,name@ha; \ 94 addi reg,reg,name@l
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H A D | treeboot-iss4xx.c | 24 #include "reg.h" 38 u32 reg[3]; local 44 getprop(memory, "reg", reg, sizeof(reg)); 45 if (reg[2]) 47 ibm4xx_memstart = reg[1];
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/linux-master/drivers/net/ethernet/intel/iavf/ |
H A D | iavf_osdep.h | 16 #define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg))) 17 #define rd32(a, reg) readl((a)->hw_addr + (reg)) 19 #define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg))) 20 #define rd64(a, reg) readq((a)->hw_addr + (reg))
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/linux-master/tools/testing/selftests/kvm/lib/s390x/ |
H A D | ucall.c | 17 int reg = run->s390_sieic.ipa & 0xf; local 19 return (void *)run->s.regs.gprs[reg];
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/linux-master/drivers/clk/socfpga/ |
H A D | stratix10-clk.h | 77 void __iomem *reg); 79 void __iomem *reg); 81 void __iomem *reg); 83 void __iomem *reg); 85 void __iomem *reg); 87 void __iomem *reg); 89 void __iomem *reg); 91 void __iomem *reg);
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn301/ |
H A D | dcn301_hwseq.c | 35 #define REG(reg)\ 36 hws->regs->reg
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/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/ |
H A D | pixelgen_public.h | 56 * @param[in] reg The offset address of the register. 62 const hrt_address reg); 68 * @param[in] reg The offset address of the register. 74 const hrt_address reg,
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H A D | dma_public.h | 24 \param reg[in] register index 27 \return none, DMA[ID].ctrl[reg] = value 31 const unsigned int reg, 37 \param reg[in] register index 40 \return DMA[ID].ctrl[reg] 44 const unsigned int reg);
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/linux-master/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_tl_debugfs.h | 35 #define ADF_TL_DATA_REG_OFF(reg, qat_gen) \ 36 offsetof(struct adf_##qat_gen##_tl_layout, reg) 38 #define ADF_TL_DEV_REG_OFF(reg, qat_gen) \ 40 offsetof(struct adf_##qat_gen##_tl_device_data_regs, reg)) 42 #define ADF_TL_SLICE_REG_OFF(slice, reg, qat_gen) \ 44 offsetof(struct adf_##qat_gen##_tl_slice_data_regs, reg)) 46 #define ADF_TL_RP_REG_OFF(reg, qat_gen) \ 48 offsetof(struct adf_##qat_gen##_tl_ring_pair_data_regs, reg))
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/linux-master/drivers/clk/sunxi/ |
H A D | clk-sun9i-cpus.c | 26 #define SUN9I_CPUS_MUX_GET_PARENT(reg) ((reg & SUN9I_CPUS_MUX_MASK) >> \ 31 #define SUN9I_CPUS_DIV_GET(reg) ((reg & SUN9I_CPUS_DIV_MASK) >> \ 33 #define SUN9I_CPUS_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_DIV_MASK) | \ 37 #define SUN9I_CPUS_PLL4_DIV_GET(reg) ((reg & SUN9I_CPUS_PLL4_DIV_MASK) >> \ 39 #define SUN9I_CPUS_PLL4_DIV_SET(reg, div) ((reg 44 void __iomem *reg; member in struct:sun9i_a80_cpus_clk 54 u32 reg; local 155 u32 reg; local [all...] |
H A D | clk-a20-gmac.c | 60 void __iomem *reg; local 78 reg = of_iomap(node, 0); 79 if (!reg) 83 gate->reg = reg; 86 mux->reg = reg; 106 iounmap(reg);
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/linux-master/arch/alpha/lib/ |
H A D | fpreg.c | 16 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); 18 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); 22 alpha_read_fp_reg (unsigned long reg) argument 26 if (unlikely(reg >= 32)) 30 val = current_thread_info()->fp[reg]; 31 else switch (reg) { 71 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg 77 alpha_write_fp_reg(unsigned long reg, unsigned long val) argument 131 alpha_read_fp_reg_s(unsigned long reg) argument 188 alpha_write_fp_reg_s(unsigned long reg, unsigned long val) argument [all...] |
/linux-master/sound/soc/codecs/ |
H A D | wm8961.c | 110 static bool wm8961_volatile(struct device *dev, unsigned int reg) argument 112 switch (reg) { 123 static bool wm8961_readable(struct device *dev, unsigned int reg) argument 125 switch (reg) { 508 u16 reg; local 524 reg = snd_soc_component_read(component, WM8961_ADDITIONAL_CONTROL_3); 525 reg &= ~WM8961_SAMPLE_RATE_MASK; 526 reg |= wm8961_srate[best].val; 527 snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_3, reg); 557 reg 598 u16 reg = snd_soc_component_read(component, WM8961_CLOCKING1); local 691 u16 reg = snd_soc_component_read(component, WM8961_ADDITIONAL_CONTROL_2); local 704 u16 reg = snd_soc_component_read(component, WM8961_ADC_DAC_CONTROL_1); local 719 u16 reg; local 746 u16 reg; local 834 u16 reg; local [all...] |
/linux-master/drivers/video/fbdev/ |
H A D | sm712.h | 27 #define smtc_mmiowb(dat, reg) writeb(dat, smtc_regbaseaddress + reg) 29 #define smtc_mmiorb(reg) readb(smtc_regbaseaddress + reg) 42 static inline void smtc_crtcw(int reg, int val) argument 44 smtc_mmiowb(reg, 0x3d4); 48 static inline void smtc_grphw(int reg, int val) argument 50 smtc_mmiowb(reg, 0x3ce); 54 static inline void smtc_attrw(int reg, int val) argument 57 smtc_mmiowb(reg, 62 smtc_seqw(int reg, int val) argument 68 smtc_seqr(int reg) argument [all...] |
/linux-master/drivers/clk/sprd/ |
H A D | gate.c | 16 unsigned int reg; local 21 regmap_read(common->regmap, common->reg, ®); 24 reg |= sg->enable_mask; 26 reg &= ~sg->enable_mask; 28 regmap_write(common->regmap, common->reg, reg); 41 * common->reg - base register 42 * common->reg + offset - set register 43 * common->reg 98 unsigned int reg; local [all...] |
/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
H A D | isp_private.h | 32 const unsigned int reg, 38 ia_css_device_store_uint32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); 40 hrt_master_port_store_32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); 47 const unsigned int reg) 52 return ia_css_device_load_uint32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data)); 54 return hrt_master_port_uload_32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data)); 60 const unsigned int reg, 63 hrt_data val = isp_ctrl_load(ID, reg); 70 const unsigned int reg, 73 hrt_data data = isp_ctrl_load(ID, reg); 30 isp_ctrl_store( const isp_ID_t ID, const unsigned int reg, const hrt_data value) argument [all...] |
/linux-master/drivers/media/pci/ddbridge/ |
H A D | ddbridge-i2c.h | 53 u8 adr, u8 reg, u8 *val, u8 len) 56 .buf = ®, .len = 1 }, 64 u8 adr, u16 reg, u8 *val, u8 len) 66 u8 msg[2] = { reg >> 8, reg & 0xff }; 76 u8 adr, u16 reg, u8 val) 78 u8 msg[3] = { reg >> 8, reg & 0xff, val }; 84 u8 adr, u8 reg, u8 val) 86 u8 msg[2] = { reg, va 52 i2c_read_regs(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val, u8 len) argument 63 i2c_read_regs16(struct i2c_adapter *adapter, u8 adr, u16 reg, u8 *val, u8 len) argument 75 i2c_write_reg16(struct i2c_adapter *adap, u8 adr, u16 reg, u8 val) argument 83 i2c_write_reg(struct i2c_adapter *adap, u8 adr, u8 reg, u8 val) argument 91 i2c_read_reg16(struct i2c_adapter *adapter, u8 adr, u16 reg, u8 *val) argument 97 i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val) argument [all...] |
/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_gt_pm_irq.c | 18 i915_reg_t reg; local 21 reg = GEN11_GPM_WGBOXPERF_INTR_MASK; 24 reg = GEN8_GT_IMR(2); 26 reg = GEN6_PMIMR; 29 intel_uncore_write(uncore, reg, mask); 65 i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; local 69 intel_uncore_write(uncore, reg, reset_mask); 70 intel_uncore_write(uncore, reg, reset_mask); 71 intel_uncore_posting_read(uncore, reg); 79 i915_reg_t reg; local [all...] |
/linux-master/drivers/phy/marvell/ |
H A D | phy-mvebu-sata.c | 32 u32 reg; local 37 reg = readl(priv->base + SATA_PHY_MODE_2); 38 reg |= (MODE_2_FORCE_PU_TX | MODE_2_FORCE_PU_RX | 40 writel(reg , priv->base + SATA_PHY_MODE_2); 43 reg = readl(priv->base + SATA_IF_CTRL); 44 reg &= ~CTRL_PHY_SHUTDOWN; 45 writel(reg, priv->base + SATA_IF_CTRL); 55 u32 reg; local 60 reg = readl(priv->base + SATA_PHY_MODE_2); 61 reg [all...] |
/linux-master/drivers/media/platform/verisilicon/ |
H A D | hantro_g1_h264_dec.c | 29 u32 reg; local 32 reg = G1_REG_DEC_CTRL0_DEC_AXI_AUTO; 34 reg |= G1_REG_DEC_CTRL0_SEQ_MBAFF_E; 36 reg |= G1_REG_DEC_CTRL0_PICORD_COUNT_E; 38 reg |= G1_REG_DEC_CTRL0_WRITE_MVS_E; 44 reg |= G1_REG_DEC_CTRL0_PIC_INTERLACE_E; 46 reg |= G1_REG_DEC_CTRL0_PIC_FIELDMODE_E; 48 reg |= G1_REG_DEC_CTRL0_PIC_TOPFIELD_E; 49 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL0); 52 reg 132 u32 reg; local [all...] |
/linux-master/arch/powerpc/boot/dts/fsl/ |
H A D | qoriq-qman1-portals.dtsi | 42 reg = <0x0 0x4000>, <0x100000 0x1000>; 48 reg = <0x4000 0x4000>, <0x101000 0x1000>; 54 reg = <0x8000 0x4000>, <0x102000 0x1000>; 60 reg = <0xc000 0x4000>, <0x103000 0x1000>; 66 reg = <0x10000 0x4000>, <0x104000 0x1000>; 72 reg = <0x14000 0x4000>, <0x105000 0x1000>; 78 reg = <0x18000 0x4000>, <0x106000 0x1000>; 85 reg = <0x1c000 0x4000>, <0x107000 0x1000>; 91 reg = <0x20000 0x4000>, <0x108000 0x1000>; 97 reg [all...] |
/linux-master/drivers/clk/imx/ |
H A D | clk-lpcg-scu.c | 26 * @reg: register of this LPCG clock 34 void __iomem *reg; member in struct:clk_lpcg_scu 48 u32 reg, val; local 52 reg = readl_relaxed(clk->reg); 53 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx); 59 reg |= val << clk->bit_idx; 60 writel(reg, clk->reg); 71 u32 reg; local 87 __imx_clk_lpcg_scu(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, bool hw_gate) argument [all...] |
/linux-master/arch/loongarch/include/asm/ |
H A D | irqflags.h | 18 "csrxchg %[val], %[mask], %[reg]\n\t" 20 : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD) 28 "csrxchg %[val], %[mask], %[reg]\n\t" 30 : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD) 38 "csrxchg %[val], %[mask], %[reg]\n\t" 40 : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD) 48 "csrxchg %[val], %[mask], %[reg]\n\t" 50 : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD) 58 "csrrd %[val], %[reg]\n\t" 60 : [reg] " [all...] |
/linux-master/drivers/base/regmap/ |
H A D | regmap-fsi.c | 15 static int regmap_fsi32_reg_read(void *context, unsigned int reg, unsigned int *val) argument 20 ret = fsi_slave_read(context, reg, &v, sizeof(v)); 28 static int regmap_fsi32_reg_write(void *context, unsigned int reg, unsigned int val) argument 32 return fsi_slave_write(context, reg, &v, sizeof(v)); 40 static int regmap_fsi32le_reg_read(void *context, unsigned int reg, unsigned int *val) argument 45 ret = fsi_slave_read(context, reg, &v, sizeof(v)); 53 static int regmap_fsi32le_reg_write(void *context, unsigned int reg, unsigned int val) argument 57 return fsi_slave_write(context, reg, &v, sizeof(v)); 65 static int regmap_fsi16_reg_read(void *context, unsigned int reg, unsigned int *val) argument 70 ret = fsi_slave_read(context, reg, 78 regmap_fsi16_reg_write(void *context, unsigned int reg, unsigned int val) argument 94 regmap_fsi16le_reg_read(void *context, unsigned int reg, unsigned int *val) argument 107 regmap_fsi16le_reg_write(void *context, unsigned int reg, unsigned int val) argument 123 regmap_fsi8_reg_read(void *context, unsigned int reg, unsigned int *val) argument 136 regmap_fsi8_reg_write(void *context, unsigned int reg, unsigned int val) argument [all...] |