/linux-master/arch/powerpc/boot/dts/fsl/ |
H A D | pq3-usb2-dr-1.dtsi | 37 reg = <0x23000 0x1000>;
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H A D | qoriq-bman1.dtsi | 37 reg = <0x31a000 0x1000>;
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H A D | qoriq-espi-0.dtsi | 39 reg = <0x110000 0x1000>;
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H A D | qoriq-gpio-0.dtsi | 37 reg = <0x130000 0x1000>;
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H A D | qoriq-gpio-1.dtsi | 37 reg = <0x131000 0x1000>;
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H A D | qoriq-gpio-2.dtsi | 37 reg = <0x132000 0x1000>;
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H A D | qoriq-gpio-3.dtsi | 37 reg = <0x133000 0x1000>;
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H A D | qoriq-qman1.dtsi | 37 reg = <0x318000 0x1000>;
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H A D | qoriq-qman3.dtsi | 37 reg = <0x318000 0x2000>;
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H A D | qoriq-usb2-dr-0.dtsi | 37 reg = <0x211000 0x1000>;
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H A D | qoriq-usb2-mph-0.dtsi | 37 reg = <0x210000 0x1000>;
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/linux-master/drivers/media/pci/cx23885/ |
H A D | cx23885-ioctl.h | 18 struct v4l2_dbg_register *reg); 22 const struct v4l2_dbg_register *reg);
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/linux-master/drivers/clk/mxs/ |
H A D | clk.h | 19 int mxs_clk_wait(void __iomem *reg, u8 shift); 25 void __iomem *reg, u8 idx); 28 void __iomem *reg, u8 shift, u8 width, u8 busy); 31 void __iomem *reg, u8 shift, u8 width, u8 busy); 39 const char *parent_name, void __iomem *reg, u8 shift) 42 reg, shift, CLK_GATE_SET_TO_DISABLE, 46 static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg, argument 51 reg, shift, width, 0, &mxs_lock); 38 mxs_clk_gate(const char *name, const char *parent_name, void __iomem *reg, u8 shift) argument
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H A D | clk.c | 14 int mxs_clk_wait(void __iomem *reg, u8 shift) argument 18 while (readl_relaxed(reg) & (1 << shift))
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/linux-master/drivers/clk/sunxi/ |
H A D | clk-a10-mod1.c | 28 void __iomem *reg; local 31 reg = of_io_request_and_map(node, 0, of_node_full_name(node)); 32 if (IS_ERR(reg)) 46 gate->reg = reg; 49 mux->reg = reg; 70 iounmap(reg);
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/linux-master/drivers/iio/imu/inv_mpu6050/ |
H A D | inv_mpu_aux.h | 14 uint8_t reg, uint8_t *val, size_t size); 17 uint8_t reg, uint8_t val);
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/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
H A D | timed_ctrl_private.h | 27 const unsigned int reg, 32 ia_css_device_store_uint32(TIMED_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); 25 timed_ctrl_reg_store( const timed_ctrl_ID_t ID, const unsigned int reg, const hrt_data value) argument
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/linux-master/arch/arm/mach-s3c/ |
H A D | pm-common.h | 20 * @reg: Pointer to the register to save. 21 * @val: Holder for the value saved from reg. 27 void __iomem *reg; member in struct:sleep_save 32 { .reg = (x) }
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/linux-master/arch/arm/kernel/ |
H A D | iwmmxt.h | 18 .macro wldrd, reg:req, base:req, offset:req 19 .inst 0xedd00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2) 22 .macro wldrw, reg:req, base:req, offset:req 23 .inst 0xfd900100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2) 26 .macro wstrd, reg:req, base:req, offset:req 27 .inst 0xedc00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2) 30 .macro wstrw, reg:req, base:req, offset:req 31 .inst 0xfd800100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
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/linux-master/drivers/vfio/platform/reset/ |
H A D | vfio_platform_calxedaxgmac.c | 51 struct vfio_platform_region *reg = &vdev->regions[0]; local 53 if (!reg->ioaddr) { 54 reg->ioaddr = 55 ioremap(reg->addr, reg->size); 56 if (!reg->ioaddr) 61 writel(0, reg->ioaddr + XGMAC_DMA_INTR_ENA); 64 xgmac_mac_disable(reg->ioaddr);
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/linux-master/sound/soc/codecs/ |
H A D | cirrus_legacy.h | 9 static inline int cirrus_read_device_id(struct regmap *regmap, unsigned int reg) argument 14 ret = regmap_bulk_read(regmap, reg, devid, ARRAY_SIZE(devid));
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/linux-master/arch/arm64/kvm/hyp/include/nvhe/ |
H A D | trap_handler.h | 15 #define DECLARE_REG(type, name, ctxt, reg) \ 16 type name = (type)cpu_reg(ctxt, (reg))
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/linux-master/drivers/gpu/drm/i915/ |
H A D | intel_sbi.h | 18 u32 intel_sbi_read(struct drm_i915_private *i915, u16 reg, 20 void intel_sbi_write(struct drm_i915_private *i915, u16 reg, u32 value,
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/linux-master/arch/arm/mach-omap2/ |
H A D | cm1_44xx.h | 28 #define OMAP44XX_CM1_REGADDR(inst, reg) \ 29 OMAP2_L4_IO_ADDRESS(OMAP4430_CM1_BASE + (inst) + (reg))
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H A D | cm1_54xx.h | 24 #define OMAP54XX_CM_CORE_AON_REGADDR(inst, reg) \ 25 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE + (inst) + (reg))
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