/linux-master/drivers/gpu/drm/arm/ |
H A D | hdlcd_drv.h | 35 return readl(hdlcd->mmio + reg);
|
/linux-master/drivers/pinctrl/ |
H A D | pinctrl-da850-pupd.c | 73 val = readl(data->base + DA850_PUPD_ENA); 86 val = readl(data->base + DA850_PUPD_SEL); 110 ena = readl(data->base + DA850_PUPD_ENA); 111 sel = readl(data->base + DA850_PUPD_SEL);
|
/linux-master/drivers/phy/marvell/ |
H A D | phy-pxa-28nm-hsic.c | 72 writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) | 95 reg = readl(base + PHY_28NM_HSIC_CTRL); 132 writel(readl(base + PHY_28NM_HSIC_CTRL) & ~PHY_28NM_HSIC_S2H_HSIC_EN, 144 writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) &
|
/linux-master/arch/arm/mach-zynq/ |
H A D | pm.c | 67 reg = readl(ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS);
|
/linux-master/drivers/gpio/ |
H A D | gpio-bcm-kona.c | 92 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); 108 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); 121 val = readl(reg_base + GPIO_CONTROL(gpio)) & GPIO_GPCTR0_IOTR_MASK; 144 val = readl(reg_base + reg_offset); 171 val = readl(reg_base + reg_offset); 205 val = readl(reg_base + GPIO_CONTROL(gpio)); 229 val = readl(reg_base + GPIO_CONTROL(gpio)); 235 val = readl(reg_base + reg_offset); 285 val = readl(reg_base + GPIO_CONTROL(gpio)); 344 val = readl(reg_bas [all...] |
/linux-master/drivers/phy/allwinner/ |
H A D | phy-sun50i-usb3.c | 66 val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); 71 val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL); 75 val = readl(phy->regs + SUNXI_ISCR); 86 val = readl(phy->regs + SUNXI_PHY_TUNE_HIGH);
|
/linux-master/drivers/watchdog/ |
H A D | pic32-dmt.c | 66 val = readl(dmt->regs + DMTSTAT_REG); 84 v = readl(dmt->regs + DMTSTAT_REG) & DMTSTAT_WINOPN; 102 return readl(dmt->regs + DMTPSCNT_REG) / rate; 116 v = readl(rst_base);
|
/linux-master/drivers/net/ethernet/mediatek/ |
H A D | mtk_wed.h | 110 return readl(dev->hw->wdma + reg); 119 return readl(dev->tx_ring[ring].wpdma + reg); 137 return readl(dev->rx_ring[ring].wpdma + reg); 155 return readl(dev->txfree_ring.wpdma + reg);
|
/linux-master/drivers/memstick/host/ |
H A D | jmb38x_ms.c | 169 while (!(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) { 178 && !(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) { 179 host->io_word[0] = readl(host->addr + DATA); 233 && !(STATUS_FIFO_FULL & readl(host->addr + STATUS))) { 244 while (!(STATUS_FIFO_FULL & readl(host->addr + STATUS))) { 371 if (!(STATUS_HAS_MEDIA & readl(host->addr + STATUS))) { 377 dev_dbg(&msh->dev, "control %08x\n", readl(host->addr + HOST_CONTROL)); 378 dev_dbg(&msh->dev, "status %08x\n", readl(host->addr + INT_STATUS)); 379 dev_dbg(&msh->dev, "hstatus %08x\n", readl(host->addr + STATUS)); 436 t_val = readl(hos [all...] |
/linux-master/sound/soc/bcm/ |
H A D | cygnus-pcm.c | 409 regval = readl(aio->cygaud->audio + p_rbuf->rdaddr); 414 regval = readl(aio->cygaud->audio + p_rbuf->wraddr); 440 esr_status0 = readl(audio_io + ESR0_STATUS_OFFSET); 441 esr_status0 &= ~readl(audio_io + ESR0_MASK_STATUS_OFFSET); 442 esr_status1 = readl(audio_io + ESR1_STATUS_OFFSET); 443 esr_status1 &= ~readl(audio_io + ESR1_MASK_STATUS_OFFSET); 444 esr_status3 = readl(audio_io + ESR3_STATUS_OFFSET); 445 esr_status3 &= ~readl(audio_io + ESR3_MASK_STATUS_OFFSET); 503 esr_status2 = readl(audio_io + ESR2_STATUS_OFFSET); 504 esr_status2 &= ~readl(audio_i [all...] |
/linux-master/drivers/pwm/ |
H A D | pwm-lpc32xx.c | 55 val = readl(lpc32xx->base); 73 val = readl(lpc32xx->base); 85 val = readl(lpc32xx->base); 144 val = readl(lpc32xx->base);
|
/linux-master/drivers/phy/renesas/ |
H A D | phy-rcar-gen3-usb2.c | 158 u32 val = readl(usb2_base + USB2_COMMCTRL); 171 u32 val = readl(usb2_base + USB2_LINECTRL1); 195 val = readl(usb2_base + vbus_ctrl_reg); 206 u32 val = readl(usb2_base + USB2_OBINTEN); 240 val = readl(usb2_base + USB2_LINECTRL1); 247 val = readl(usb2_base + USB2_LINECTRL1); 274 return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON); 276 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); 289 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI); 395 val = readl(usb2_bas [all...] |
/linux-master/drivers/gpu/drm/msm/adreno/ |
H A D | a6xx_gmu.h | 106 return readl(gmu->mmio + (offset << 2)); 134 val = (u64) readl(gmu->mmio + (lo << 2)); 135 val |= ((u64) readl(gmu->mmio + (hi << 2)) << 32); 146 return readl(gmu->rscc + (offset << 2));
|
/linux-master/sound/soc/xilinx/ |
H A D | xlnx_formatter_pcm.c | 251 val = readl(mmio_base + XLNX_AUD_CTRL); 255 val = readl(mmio_base + XLNX_AUD_CTRL); 260 val = readl(mmio_base + XLNX_AUD_CTRL); 272 val = readl(mmio_base + XLNX_AUD_CTRL); 288 val = readl(reg); 307 val = readl(reg); 367 val = readl(adata->mmio + XLNX_AUD_CORE_CONFIG); 412 val = readl(stream_data->mmio + XLNX_AUD_CTRL); 446 pos = readl(stream_data->mmio + XLNX_AUD_XFER_COUNT); 484 val = readl(stream_dat [all...] |
/linux-master/drivers/clk/renesas/ |
H A D | clk-r8a7740.c | 95 u32 value = readl(base + CPG_FRQCRC); 99 u32 value = readl(base + CPG_FRQCRA); 104 u32 value = readl(base + CPG_PLLC2CR); 108 u32 value = readl(base + CPG_USBCKCR);
|
/linux-master/drivers/hsi/controllers/ |
H A D | omap_ssi_core.c | 47 seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG)); 48 seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG)); 49 seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG)); 66 readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG)); 68 readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG)); 70 readl(gdd + SSI_GDD_HW_ID_REG)); 72 readl(gdd + SSI_GDD_PPORT_ID_REG)); 74 readl(gdd + SSI_GDD_MPORT_ID_REG)); 76 readl(gdd + SSI_GDD_TEST_REG)); 78 readl(gd [all...] |
/linux-master/drivers/net/ethernet/chelsio/cxgb/ |
H A D | espi.c | 65 busy = readl(adapter->regs + A_ESPI_GOSTAT) & F_ESPI_CMD_BUSY; 78 if (!(readl(adapter->regs + A_ESPI_RX_RESET) & F_RX_CLK_STATUS)) { 110 u32 enable, pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); 126 readl(espi->adapter->regs + A_ESPI_DIP2_ERR_COUNT); 133 u32 pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); 141 u32 status = readl(espi->adapter->regs + A_ESPI_INTR_STATUS); 160 readl(espi->adapter->regs + A_ESPI_DIP2_ERR_COUNT); 264 espi->misc_ctrl = readl(adapter->regs + A_ESPI_MISC_CONTROL); 323 sel = readl(adapter->regs + A_ESPI_SCH_TOKEN3); 326 sel = readl(adapte [all...] |
/linux-master/drivers/i2c/busses/ |
H A D | i2c-altera.c | 96 int_en = readl(idev->base + ALTR_I2C_ISER); 107 u32 int_en = readl(idev->base + ALTR_I2C_ISR); 114 u32 tmp = readl(idev->base + ALTR_I2C_CTRL); 121 u32 tmp = readl(idev->base + ALTR_I2C_CTRL); 194 size_t rx_fifo_avail = readl(idev->base + ALTR_I2C_RX_FIFO_LVL); 198 *idev->buf++ = readl(idev->base + ALTR_I2C_RX_DATA); 209 size_t tx_fifo_avail = idev->fifo_size - readl(idev->base + 228 idev->isr_status = readl(idev->base + ALTR_I2C_ISR) & idev->isr_mask; 322 readl(idev->base + ALTR_I2C_RX_DATA); 323 } while (readl(ide [all...] |
/linux-master/drivers/rtc/ |
H A D | rtc-sunxi.c | 149 val = readl(chip->base + SUNXI_ALRM_IRQ_STA); 169 alrm_val = readl(chip->base + SUNXI_ALRM_EN); 172 alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN); 191 alrm = readl(chip->base + SUNXI_ALRM_DHMS); 192 date = readl(chip->base + SUNXI_RTC_YMD); 211 alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN); 227 date = readl(chip->base + SUNXI_RTC_YMD); 228 time = readl(chip->base + SUNXI_RTC_HMS); 229 } while ((date != readl(chip->base + SUNXI_RTC_YMD)) || 230 (time != readl(chi [all...] |
/linux-master/drivers/thermal/ |
H A D | k3_j72xx_bandgap.c | 232 s0 = readl(bgp->base + devdata->stat_offset) & 234 s1 = readl(bgp->base + devdata->stat_offset) & 236 s2 = readl(bgp->base + devdata->stat_offset) & 300 tmp = (readl(fuse_base + 0x8) & 0xE0000000) >> (29); 301 tmp |= ((readl(fuse_base + 0xC) & 0x1F) << 3); 305 tmp = (readl(fuse_base + 0x4) & 0xF8000000) >> (27); 306 tmp |= ((readl(fuse_base + 0x8) & 0xF) << 5); 309 tmp = readl(fuse_base + ct_offsets[id][i]); 408 if ((readl(fuse_base) & 0xc0000000) == 0xc0000000) 424 val = readl(bg [all...] |
/linux-master/drivers/perf/hisilicon/ |
H A D | hisi_uncore_pa_pmu.c | 69 val = readl(pa_pmu->base + PA_TT_CTRL); 83 val = readl(pa_pmu->base + PA_TT_CTRL); 185 val = readl(pa_pmu->base + reg); 195 val = readl(pa_pmu->base + PA_PERF_CTRL); 204 val = readl(pa_pmu->base + PA_PERF_CTRL); 215 val = readl(pa_pmu->base + PA_EVENT_CTRL); 226 val = readl(pa_pmu->base + PA_EVENT_CTRL); 238 val = readl(pa_pmu->base + regs->mask_offset); 250 val = readl(pa_pmu->base + regs->mask_offset); 259 return readl(pa_pm [all...] |
/linux-master/sound/soc/amd/ps/ |
H A D | ps-pdm-dma.c | 62 pdm_ctrl = readl(acp_base + ACP_WOV_MISC_CTRL); 73 ext_int_ctrl = readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL); 84 ext_int_ctrl = readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL); 96 pdm_enable = readl(acp_base + ACP_WOV_PDM_ENABLE); 97 pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 118 pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 134 pdm_enable = readl(acp_base + ACP_WOV_PDM_ENABLE); 135 pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 141 pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); 243 high = readl(rt [all...] |
/linux-master/drivers/usb/host/ |
H A D | xhci-hub.c | 111 reg = readl(&xhci->cap_regs->hcc_params); 116 reg = readl(&xhci->cap_regs->hcs_params3); 301 portsc = readl(rhub->ports[i]->addr); 358 portsc = readl(rhub->ports[i]->addr); 568 portsc = readl(port->addr); 574 portsc = readl(port->addr); 624 port_status = readl(addr); 652 temp = readl(port->addr); 662 readl(port->addr); 685 temp = readl(por [all...] |
/linux-master/drivers/tty/serial/ |
H A D | xilinx_uartps.c | 251 while ((readl(port->membase + CDNS_UART_SR) & 254 rxbs_status = readl(port->membase + CDNS_UART_RXBS); 255 data = readl(port->membase + CDNS_UART_FIFO); 339 val = readl(cdns_uart->port->membase + CDNS_UART_MODEMCR); 386 status = readl(port->membase + CDNS_UART_SR); 443 !(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXFULL) && 480 isrstatus = readl(port->membase + CDNS_UART_ISR); 495 !(readl(port->membase + CDNS_UART_CR) & CDNS_UART_CR_RX_DIS)) 584 mreg = readl(port->membase + CDNS_UART_MR); 638 ctrl_reg = readl(por [all...] |
/linux-master/drivers/pci/controller/dwc/ |
H A D | pcie-uniphier-ep.c | 95 val = readl(priv->base + PCL_APP_READY_CTRL); 108 val = readl(priv->base + PCL_RSTCTRL2); 121 val = readl(priv->base + PCL_MODE); 126 val = readl(priv->base + PCL_APP_CLK_CTRL); 131 val = readl(priv->base + PCL_RSTCTRL0); 146 val = readl(priv->base + PCL_MODE); 151 val = readl(priv->base + PCL_APP_PM0); 156 val = readl(priv->base + PCL_PINCTRL0); 168 val = readl(priv->base + PCL_PINCTRL0); 227 val = readl(pri [all...] |