/linux-master/arch/alpha/kernel/ |
H A D | perf_event.c | 344 struct perf_event *pe; local 354 for_each_sibling_event(pe, group) { 355 if (!is_software_event(pe) && pe->state != PERF_EVENT_STATE_OFF) { 358 event[n] = pe; 359 evtype[n] = pe->hw.event_base; 400 struct perf_event *pe = cpuc->event[j]; local 403 cpuc->current_idx[j] != pe->hw.idx) { 404 alpha_perf_event_update(pe, &pe 412 struct perf_event *pe = cpuc->event[j]; local [all...] |
H A D | sys_marvel.c | 250 long base = (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT) + 16; 254 io7->pe, base); 360 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT), 361 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT)); 375 irq |= io7->pe << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */
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/linux-master/tools/perf/util/ |
H A D | pmu.c | 508 static int update_alias(const struct pmu_event *pe, argument 516 assign_str(pe->name, "desc", &data->alias->desc, pe->desc); 517 assign_str(pe->name, "long_desc", &data->alias->long_desc, pe->long_desc); 518 assign_str(pe->name, "topic", &data->alias->topic, pe->topic); 519 data->alias->per_pkg = pe->perpkg; 520 if (pe->event) { 522 ret = parse_events_terms(&data->alias->terms, pe 534 perf_pmu__new_alias(struct perf_pmu *pmu, const char *name, const char *desc, const char *val, FILE *val_fd, const struct pmu_event *pe, enum event_source src) argument 961 pmu_add_cpu_aliases_map_callback(const struct pmu_event *pe, const struct pmu_events_table *table __maybe_unused, void *vdata) argument 993 pmu_add_sys_aliases_iter_fn(const struct pmu_event *pe, const struct pmu_events_table *table __maybe_unused, void *vdata) argument [all...] |
/linux-master/include/linux/ |
H A D | posix_acl.h | 36 #define FOREACH_ACL_ENTRY(pa, acl, pe) \ 37 for(pa=(acl)->a_entries, pe=pa+(acl)->a_count; pa<pe; pa++)
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/linux-master/tools/testing/selftests/resctrl/ |
H A D | resctrl_val.c | 57 struct perf_event_attr pe; member in struct:imc_counter_config 69 memset(&imc_counters_config[i][j].pe, 0, 71 imc_counters_config[i][j].pe.type = imc_counters_config[i][j].type; 72 imc_counters_config[i][j].pe.size = sizeof(struct perf_event_attr); 73 imc_counters_config[i][j].pe.disabled = 1; 74 imc_counters_config[i][j].pe.inherit = 1; 75 imc_counters_config[i][j].pe.exclude_guest = 0; 76 imc_counters_config[i][j].pe.config = 79 imc_counters_config[i][j].pe.sample_type = PERF_SAMPLE_IDENTIFIER; 80 imc_counters_config[i][j].pe [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_trace.h | 370 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, 372 TP_ARGS(pe, addr, count, incr, flags, immediate), 374 __field(u64, pe) 383 __entry->pe = pe; 390 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u, " 391 "immediate=%d", __entry->pe, __entry->addr, __entry->incr, 396 TP_PROTO(uint64_t pe, uint64_t src, unsigned count, bool immediate), 397 TP_ARGS(pe, src, count, immediate), 399 __field(u64, pe) [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
H A D | dp.c | 182 info->pe = nvbios_rd08(bios, data + 0x03); 190 info->pe = nvbios_rd08(bios, data + 0x02); 195 info->pe = nvbios_rd08(bios, data + 0x01); 207 nvbios_dpcfg_match(struct nvkm_bios *bios, u16 outp, u8 pc, u8 vs, u8 pe, argument 216 idx = (pc * 10) + vsoff[vs] + pe; 226 nvbios_rd08(bios, data + 0x01) == pe)
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/linux-master/drivers/misc/cxl/ |
H A D | fault.c | 117 pr_devel("CXL interrupt: Segment fault pe: %i ea: %#llx\n", ctx->pe, ea); 189 pr_devel("Page fault successfully handled for pe: %i!\n", ctx->pe); 239 cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) != ctx->pe) { 255 pr_devel("CXL BOTTOM HALF handling fault for afu pe: %i. " 256 "DSISR: %#llx DAR: %#llx\n", ctx->pe, dsisr, dar); 262 pr_devel("%s: unable to get mm for pe=%d pid=%i\n", 263 __func__, ctx->pe, pid_nr(ctx->pid)); 267 pr_devel("Handling page fault for pe [all...] |
H A D | context.c | 101 ctx->pe = i; 104 ctx->external_pe = ctx->pe; 135 pr_devel("%s: pe: %i address: 0x%lx offset: 0x%llx\n", 136 __func__, ctx->pe, vmf->address, offset); 220 pr_devel("%s: mmio physical: %llx pe: %i master:%i\n", __func__, 221 ctx->psn_phys, ctx->pe , ctx->master); 347 idr_remove(&ctx->afu->contexts_idr, ctx->pe);
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/linux-master/drivers/nvme/target/ |
H A D | fc.c | 111 struct nvmet_fc_port_entry *pe; member in struct:nvmet_fc_tgtport 1144 if (!tgtport->pe) 1286 struct nvmet_fc_port_entry *pe, 1291 pe->tgtport = tgtport; 1292 tgtport->pe = pe; 1294 pe->port = port; 1295 port->priv = pe; 1297 pe->node_name = tgtport->fc_target_port.node_name; 1298 pe 1285 nvmet_fc_portentry_bind(struct nvmet_fc_tgtport *tgtport, struct nvmet_fc_port_entry *pe, struct nvmet_port *port) argument 1305 nvmet_fc_portentry_unbind(struct nvmet_fc_port_entry *pe) argument 1324 struct nvmet_fc_port_entry *pe; local 1346 struct nvmet_fc_port_entry *pe; local 2871 struct nvmet_fc_port_entry *pe; local 2917 struct nvmet_fc_port_entry *pe = port->priv; local 2930 struct nvmet_fc_port_entry *pe = port->priv; local [all...] |
/linux-master/drivers/net/wireless/ath/ |
H A D | dfs_pattern_detector.h | 100 struct pulse_event *pe,
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H A D | dfs_pri_detector.c | 118 static void pool_put_pulse_elem(struct pulse_elem *pe) argument 121 list_add(&pe->head, &pulse_pool); 149 struct pulse_elem *pe = NULL; local 152 pe = list_first_entry(&pulse_pool, struct pulse_elem, head); 153 list_del(&pe->head); 157 return pe;
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/linux-master/arch/riscv/kernel/ |
H A D | efi-header.S | 7 #include <linux/pe.h>
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/linux-master/tools/perf/pmu-events/ |
H A D | pmu-events.h | 73 typedef int (*pmu_event_iter_fn)(const struct pmu_event *pe,
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/linux-master/arch/powerpc/kernel/ |
H A D | rtas_pci.c | 57 if (pdn->edev && pdn->edev->pe && 58 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED)) 108 if (pdn->edev && pdn->edev->pe && 109 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED))
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/linux-master/crypto/asymmetric_keys/ |
H A D | verify_pefile.c | 13 #include <linux/pe.h> 26 const struct pe_hdr *pe; local 47 chkaddr(cursor, mz->peaddr, sizeof(*pe)); 48 pe = pebuf + mz->peaddr; 49 if (pe->magic != PE_MAGIC) 51 cursor = mz->peaddr + sizeof(*pe); 110 ctx->n_sections = pe->sections;
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/linux-master/net/netfilter/ipvs/ |
H A D | ip_vs_conn.c | 128 if (p->pe_data && p->pe->hashkey_raw) 129 return p->pe->hashkey_raw(p, ip_vs_conn_rnd, inverse) & 150 if (cp->pe) { 151 p.pe = cp->pe; 359 if (unlikely(p->pe_data && p->pe->ct_match)) { 362 if (p->pe == cp->pe && p->pe->ct_match(p, cp)) { 817 ip_vs_pe_put(cp->pe); [all...] |
/linux-master/drivers/vfio/ |
H A D | vfio_iommu_spapr_tce.c | 780 struct eeh_pe *pe; local 784 pe = eeh_iommu_group_to_pe(group); 785 if (!pe) 796 return eeh_pe_set_option(pe, EEH_OPT_DISABLE); 798 return eeh_pe_set_option(pe, EEH_OPT_ENABLE); 800 return eeh_pe_set_option(pe, EEH_OPT_THAW_MMIO); 802 return eeh_pe_set_option(pe, EEH_OPT_THAW_DMA); 804 return eeh_pe_get_state(pe); 807 return eeh_pe_reset(pe, EEH_RESET_DEACTIVATE, true); 809 return eeh_pe_reset(pe, EEH_RESET_HO [all...] |
/linux-master/arch/arm64/kernel/ |
H A D | efi-header.S | 7 #include <linux/pe.h>
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/linux-master/drivers/firmware/efi/libstub/ |
H A D | zboot-header.S | 3 #include <linux/pe.h>
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | cik_sdma.c | 796 * @pe: addr of the page entry 804 uint64_t pe, uint64_t src, 818 ib->ptr[ib->length_dw++] = lower_32_bits(pe); 819 ib->ptr[ib->length_dw++] = upper_32_bits(pe); 821 pe += bytes; 832 * @pe: addr of the page entry 833 * @addr: dst addr to write into pe 842 uint64_t pe, 857 ib->ptr[ib->length_dw++] = pe; 858 ib->ptr[ib->length_dw++] = upper_32_bits(pe); 802 cik_sdma_vm_copy_pages(struct radeon_device *rdev, struct radeon_ib *ib, uint64_t pe, uint64_t src, unsigned count) argument 840 cik_sdma_vm_write_pages(struct radeon_device *rdev, struct radeon_ib *ib, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint32_t flags) argument 889 cik_sdma_vm_set_pages(struct radeon_device *rdev, struct radeon_ib *ib, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint32_t flags) argument [all...] |
/linux-master/drivers/net/ethernet/marvell/mvpp2/ |
H A D | mvpp2_prs.h | 299 int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe, 302 unsigned int mvpp2_prs_tcam_port_map_get(struct mvpp2_prs_entry *pe); 304 void mvpp2_prs_tcam_data_byte_get(struct mvpp2_prs_entry *pe,
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/linux-master/drivers/scsi/cxlflash/ |
H A D | ocxl_hw.c | 165 return ctx->pe; 353 ctx->psn_phys = afu->ppmmio_phys + (ctx->pe * ctx->psn_size); 365 rc = ocxl_link_add_pe(link_token, ctx->pe, pid, 0, 0, 417 ctx->pe); 426 rc = ocxl_link_remove_pe(afu->link_token, ctx->pe); 511 ctx->pe = rc; 553 idr_remove(&ctx->hw_afu->idr, ctx->pe); 998 dev_dbg(dev, "%s: Poll wait completed for pe %i mask %i\n", 999 __func__, ctx->pe, mask); 1062 event.header.process_element = ctx->pe; [all...] |
/linux-master/fs/afs/ |
H A D | server_list.c | 159 struct afs_server_entry *se, *pe; local 171 pe = list_entry(p, struct afs_server_entry, slink); 172 if (volume->vid <= pe->volume->vid)
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/linux-master/drivers/gpu/drm/msm/disp/mdp5/ |
H A D | mdp5_plane.c | 752 struct pixel_ext *pe, 816 src_w, pe->left, pe->right, 817 src_h, pe->top, pe->bottom); 858 struct pixel_ext pe = { { 0 } }; local 924 pe.left, pe.right, true); 926 pe.top, pe 748 mdp5_hwpipe_mode_set(struct mdp5_kms *mdp5_kms, struct mdp5_hw_pipe *hwpipe, struct drm_framebuffer *fb, struct phase_step *step, struct pixel_ext *pe, u32 scale_config, u32 hdecm, u32 vdecm, bool hflip, bool vflip, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, u32 src_img_w, u32 src_img_h, u32 src_x, u32 src_y, u32 src_w, u32 src_h) argument [all...] |