Searched refs:parent_names (Results 26 - 50 of 326) sorted by relevance

1234567891011>>

/linux-master/drivers/clk/mxs/
H A Dclk.h47 u8 shift, u8 width, const char *const *parent_names, int num_parents)
49 return clk_register_mux(NULL, name, parent_names, num_parents,
46 mxs_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char *const *parent_names, int num_parents) argument
/linux-master/drivers/clk/ux500/
H A Dclk.h64 const char * const *parent_names,
89 const char **parent_names,
/linux-master/drivers/clk/tegra/
H A Dclk-periph.c169 const char * const *parent_names, int num_parents,
189 init.parent_names = parent_names;
217 const char * const *parent_names, int num_parents,
221 return _tegra_clk_register_periph(name, parent_names, num_parents,
226 const char * const *parent_names, int num_parents,
231 return _tegra_clk_register_periph(name, parent_names, num_parents,
238 return _tegra_clk_register_periph(init->name, init->p.parent_names,
168 _tegra_clk_register_periph(const char *name, const char * const *parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset, unsigned long flags) argument
216 tegra_clk_register_periph(const char *name, const char * const *parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset, unsigned long flags) argument
225 tegra_clk_register_periph_nodiv(const char *name, const char * const *parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset) argument
/linux-master/drivers/clk/at91/
H A Dat91sam9260.c335 const char *parent_names[6]; local
385 parent_names[0] = "slow_rc_osc";
386 parent_names[1] = "slow_xtal";
388 parent_names, 2);
414 parent_names[0] = slck_name;
415 parent_names[1] = "mainck";
416 parent_names[2] = "pllack";
417 parent_names[3] = "pllbck";
419 parent_names, NULL,
441 parent_names[
[all...]
H A Ddt-compat.c131 const char *parent_names[GENERATED_SOURCE_MAX]; local
140 of_clk_parent_fill(np, parent_names, num_parents);
174 parent_names, NULL, NULL,
221 const char *parent_names[2]; local
237 ret = of_clk_parent_fill(i2s_mux_np, parent_names, 2);
242 parent_names, 2, bus_id);
338 const char *parent_names[2]; local
348 of_clk_parent_fill(np, parent_names, num_parents);
357 hw = at91_clk_register_sam9x5_main(regmap, name, parent_names, NULL,
398 const char *parent_names[MASTER_SOURCE_MA local
744 const char *parent_names[PROG_SOURCE_MAX]; local
806 const char *parent_names[2]; local
842 const char *parent_names[SMD_SOURCE_MAX]; local
929 const char *parent_names[USB_SOURCE_MAX]; local
[all...]
H A Dclk-usb.c224 const char **parent_names, u8 num_parents,
238 init.parent_names = parent_names;
260 const char **parent_names, u8 num_parents)
262 return _at91sam9x5_clk_register_usb(regmap, name, parent_names,
268 const char **parent_names, u8 num_parents)
270 return _at91sam9x5_clk_register_usb(regmap, name, parent_names,
289 init.parent_names = &parent_name;
406 init.parent_names = &parent_name;
223 _at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, const char **parent_names, u8 num_parents, u32 usbs_mask) argument
259 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, const char **parent_names, u8 num_parents) argument
267 sam9x60_clk_register_usb(struct regmap *regmap, const char *name, const char **parent_names, u8 num_parents) argument
H A Dclk-smd.c114 const char **parent_names, u8 num_parents)
127 init.parent_names = parent_names;
113 at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name, const char **parent_names, u8 num_parents) argument
/linux-master/drivers/clk/versatile/
H A Dclk-sp810.c86 const char *parent_names[2]; local
87 int num = ARRAY_SIZE(parent_names);
97 if (of_clk_parent_fill(node, parent_names, num) != num) {
110 init.parent_names = parent_names;
/linux-master/drivers/clk/
H A Dclk-mux.c151 const char * const *parent_names,
182 init.parent_names = parent_names;
217 const char * const *parent_names,
229 hw = __clk_hw_register_mux(dev, np, name, num_parents, parent_names, parent_hws,
245 const char * const *parent_names, u8 num_parents,
251 hw = clk_hw_register_mux_table(dev, name, parent_names,
149 __clk_hw_register_mux(struct device *dev, struct device_node *np, const char *name, u8 num_parents, const char * const *parent_names, const struct clk_hw **parent_hws, const struct clk_parent_data *parent_data, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, const u32 *table, spinlock_t *lock) argument
215 __devm_clk_hw_register_mux(struct device *dev, struct device_node *np, const char *name, u8 num_parents, const char * const *parent_names, const struct clk_hw **parent_hws, const struct clk_parent_data *parent_data, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, const u32 *table, spinlock_t *lock) argument
244 clk_register_mux_table(struct device *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, const u32 *table, spinlock_t *lock) argument
H A Dclk-versaclock5.c948 const char *parent_names[2]; local
1004 parent_names[init.num_parents++] = __clk_get_name(vc5->pin_xin);
1012 parent_names[init.num_parents++] = __clk_get_name(vc5->pin_xin);
1017 parent_names[init.num_parents++] =
1040 init.parent_names = parent_names;
1058 init.parent_names = parent_names;
1059 parent_names[0] = clk_hw_get_name(&vc5->clk_mux);
1077 init.parent_names
[all...]
/linux-master/drivers/clk/rockchip/
H A Dclk-inverter.c74 const char *const *parent_names, u8 num_parents,
89 init.parent_names = parent_names;
73 rockchip_clk_register_inverter(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *reg, int shift, int flags, spinlock_t *lock) argument
H A Dclk-muxgrf.c57 const char *const *parent_names, u8 num_parents,
77 init.parent_names = parent_names;
56 rockchip_clk_register_muxgrf(const char *name, const char *const *parent_names, u8 num_parents, int flags, struct regmap *regmap, int reg, int shift, int width, int mux_flags) argument
H A Dclk-ddr.c91 const char *const *parent_names,
107 init.parent_names = parent_names;
90 rockchip_clk_register_ddrclk(const char *name, int flags, const char *const *parent_names, u8 num_parents, int mux_offset, int mux_shift, int mux_width, int div_shift, int div_width, int ddr_flag, void __iomem *reg_base, spinlock_t *lock) argument
/linux-master/drivers/clk/imx/
H A Dclk-gpr-mux.c75 u32 reg, const char **parent_names,
96 init.parent_names = parent_names;
74 imx_clk_gpr_mux(const char *name, const char *compatible, u32 reg, const char **parent_names, u8 num_parents, const u32 *mux_table, u32 mask) argument
/linux-master/sound/soc/codecs/
H A Dtlv320aic32x4-clk.c41 const char * const *parent_names; member in struct:aic32x4_clkdesc
401 .parent_names =
409 .parent_names =
417 .parent_names = (const char * []) { "codec_clkin" },
424 .parent_names = (const char * []) { "ndac" },
431 .parent_names = (const char * []) { "codec_clkin" },
438 .parent_names = (const char * []) { "nadc" },
445 .parent_names =
462 init.parent_names = desc->parent_names;
[all...]
/linux-master/drivers/clk/hisilicon/
H A Dclk-hisi-phase.c107 init.parent_names = clks->parent_names ? &clks->parent_names : NULL;
108 init.num_parents = clks->parent_names ? 1 : 0;
/linux-master/drivers/clk/uniphier/
H A Dclk-uniphier-fixed-factor.c27 init.parent_names = data->parent_name ? &data->parent_name : NULL;
H A Dclk-uniphier-fixed-rate.c28 init.parent_names = NULL;
H A Dclk-uniphier-mux.c72 init.parent_names = data->parent_names;
H A Dclk-uniphier.h26 const char *parent_names[UNIPHIER_CLK_CPUGEAR_MAX_PARENTS]; member in struct:uniphier_clk_cpugear_data
49 const char *parent_names[UNIPHIER_CLK_MUX_MAX_PARENTS]; member in struct:uniphier_clk_mux_data
76 .parent_names = { __VA_ARGS__ }, \
/linux-master/drivers/clk/ti/
H A Dapll.c166 kfree(init->parent_names);
173 kfree(init->parent_names);
183 const char **parent_names = NULL; local
204 parent_names = kcalloc(init->num_parents, sizeof(char *), GFP_KERNEL);
205 if (!parent_names)
208 of_clk_parent_fill(node, parent_names, init->num_parents);
210 init->parent_names = parent_names;
225 kfree(parent_names);
371 init->parent_names
[all...]
/linux-master/drivers/net/mdio/
H A Dmdio-mux-meson-g12a.c225 const char *parent_names[PLL_MUX_NUM_PARENT]; local
243 parent_names[i] = __clk_get_name(clk);
258 init.parent_names = parent_names;
285 parent_names[0] = __clk_get_name(clk);
286 init.parent_names = parent_names;
/linux-master/drivers/clk/bcm/
H A Dclk-kona-setup.c530 static const char **parent_names; local
572 parent_names = kmalloc_array(parent_count, sizeof(*parent_names),
574 if (!parent_names)
581 kfree(parent_names);
589 parent_names[j] = clocks[i];
594 *names = parent_names;
604 const char **parent_names = NULL; local
622 parent_sel = parent_process(clocks, &parent_count, &parent_names);
632 init_data->parent_names
[all...]
/linux-master/drivers/clk/socfpga/
H A Dclk-periph-s10.c122 init.parent_names = parent_name ? &parent_name : NULL;
123 if (init.parent_names == NULL)
159 init.parent_names = parent_name ? &parent_name : NULL;
203 init.parent_names = parent_name ? &parent_name : NULL;
204 if (init.parent_names == NULL)
/linux-master/drivers/clk/microchip/
H A Dclk-pic32mzda.c32 .parent_names = (const char *[]) { \
46 .parent_names = (const char *[]) { \
84 .parent_names = (const char *[]) {
102 .parent_names = (const char *[]) {
117 .parent_names = NULL,

Completed in 374 milliseconds

1234567891011>>