Searched refs:mask (Results 176 - 200 of 6721) sorted by relevance

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/linux-master/drivers/mfd/
H A Das3722.c62 .mask = AS3722_INTERRUPT_MASK1_LID,
65 .mask = AS3722_INTERRUPT_MASK1_ACOK,
68 .mask = AS3722_INTERRUPT_MASK1_ENABLE1,
71 .mask = AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0,
74 .mask = AS3722_INTERRUPT_MASK1_ONKEY_LONG,
77 .mask = AS3722_INTERRUPT_MASK1_ONKEY,
80 .mask = AS3722_INTERRUPT_MASK1_OVTMP,
83 .mask = AS3722_INTERRUPT_MASK1_LOWBAT,
88 .mask = AS3722_INTERRUPT_MASK2_SD0_LV,
92 .mask
[all...]
/linux-master/arch/alpha/include/asm/
H A Dspecial_insns.h34 #define amask(mask) \
35 ({ unsigned long __amask, __input = (mask); \
/linux-master/drivers/gpu/drm/xe/
H A Dxe_gt_topology.h12 * Loop over each DSS with the bit is 1 in geometry or compute mask
13 * @dss: iterated DSS bit from the DSS mask
29 xe_dss_mask_group_ffs(const xe_dss_mask_t mask, int groupsize, int groupnum);
31 bool xe_dss_mask_empty(const xe_dss_mask_t mask);
/linux-master/drivers/gpu/drm/nouveau/nvkm/core/
H A Dintr.c30 enum nvkm_intr_type type, int *leaf, u32 *mask)
39 while (data && data->mask) {
45 if (data->mask & BIT(tdev->intr)) {
47 *mask = BIT(tdev->intr);
55 *mask = data->mask;
67 *mask = BIT(type % 32);
76 nvkm_intr_find(struct nvkm_subdev *subdev, enum nvkm_intr_type type, int *leaf, u32 *mask) argument
82 ret = nvkm_intr_xlat(subdev, intr, type, leaf, mask);
91 nvkm_intr_allow_locked(struct nvkm_intr *intr, int leaf, u32 mask) argument
29 nvkm_intr_xlat(struct nvkm_subdev *subdev, struct nvkm_intr *intr, enum nvkm_intr_type type, int *leaf, u32 *mask) argument
108 u32 mask; local
120 nvkm_intr_block_locked(struct nvkm_intr *intr, int leaf, u32 mask) argument
134 u32 mask; local
[all...]
/linux-master/arch/powerpc/math-emu/
H A Dmtfsf.c12 u32 mask; local
16 mask = 0x0f;
18 mask = ~0;
20 mask = ((FM & 1) |
30 fpscr = ((__FPU_FPSCR & ~mask) | (frB[1] & mask)) &
39 * is the same. Simply shift and mask to check for enabled
/linux-master/arch/mips/cavium-octeon/executive/
H A Dcvmx-interrupt-rsl.c52 int mask; local
60 mask = 0xf; /* Set enables for 4 ports */
62 mask = 0x7; /* Set enables for 3 ports */
66 csr.s.txpsh = mask;
67 csr.s.txpop = mask;
68 csr.s.ovrflw = mask;
/linux-master/arch/sparc/include/asm/
H A Dsbi.h69 static inline int acquire_sbi(int devid, int mask) argument
72 "=r" (mask) :
73 "0" (mask),
76 return mask;
79 static inline void release_sbi(int devid, int mask) argument
82 "r" (mask),
/linux-master/arch/arm/kernel/
H A Dio.c15 void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set) argument
21 value = readl_relaxed(reg) & ~mask;
22 value |= (set & mask);
28 void atomic_io_modify(void __iomem *reg, u32 mask, u32 set) argument
34 value = readl_relaxed(reg) & ~mask;
35 value |= (set & mask);
/linux-master/arch/sh/boards/mach-sdk7786/
H A Dnmi.c50 unsigned int source, mask, tmp; local
55 mask = NMIMR_MAN_NMIM;
59 mask = NMIMR_AUX_NMIM;
63 mask = NMIMR_MAN_NMIM | NMIMR_AUX_NMIM;
68 source = mask = 0;
79 fpga_write_reg(NMIMR_MASK ^ mask, NMIMR);
/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A Dtimed_ctrl.c26 hrt_data mask,
35 timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, mask);
47 hrt_data mask,
57 timed_ctrl_snd_commnd(ID, mask, condition, counter,
63 hrt_data mask,
73 timed_ctrl_snd_commnd(ID, mask, condition, counter,
24 timed_ctrl_snd_commnd( const timed_ctrl_ID_t ID, hrt_data mask, hrt_data condition, hrt_data counter, hrt_address addr, hrt_data value) argument
45 timed_ctrl_snd_sp_commnd( const timed_ctrl_ID_t ID, hrt_data mask, hrt_data condition, hrt_data counter, const sp_ID_t SP_ID, hrt_address offset, hrt_data value) argument
61 timed_ctrl_snd_gpio_commnd( const timed_ctrl_ID_t ID, hrt_data mask, hrt_data condition, hrt_data counter, const gpio_ID_t GPIO_ID, hrt_address offset, hrt_data value) argument
/linux-master/tools/testing/selftests/arm64/mte/
H A Dcheck_prctl.c63 void set_mode_test(const char *name, int hwcap2, int mask) argument
72 ret = set_tagged_addr_ctrl(mask);
84 if ((ret & PR_MTE_TCF_MASK) == mask) {
88 (ret & PR_MTE_TCF_MASK), mask);
94 int mask; member in struct:mte_mode
114 mte_modes[i].mask);
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dintr.h24 void (*block)(struct nvkm_intr *, int leaf, u32 mask);
25 void (*allow)(struct nvkm_intr *, int leaf, u32 mask);
26 void (*reset)(struct nvkm_intr *, int leaf, u32 mask);
32 u32 mask; /* 0-terminated. */ member in struct:nvkm_intr::nvkm_intr_data
39 u32 *mask; member in struct:nvkm_intr
61 u32 mask; member in struct:nvkm_inth
/linux-master/tools/include/asm-generic/
H A Datomic-gcc.h75 unsigned long mask = BIT_MASK(nr); local
80 old = __sync_fetch_and_or(addr, mask);
81 return !!(old & mask);
86 unsigned long mask = BIT_MASK(nr); local
91 old = __sync_fetch_and_and(addr, ~mask);
92 return !!(old & mask);
/linux-master/arch/arm/mach-davinci/
H A Dmux.c38 unsigned int mask, warn = 0; local
64 if (cfg->mask) {
70 mask = (cfg->mask << cfg->mask_offset);
71 tmp1 = reg_orig & mask;
72 reg = reg_orig & ~mask;
/linux-master/drivers/net/wireless/ath/ath12k/
H A Ddebug.h39 enum ath12k_debug_mask mask,
42 enum ath12k_debug_mask mask,
53 enum ath12k_debug_mask mask,
62 typeof(dbg_mask) mask = (dbg_mask); \
63 if (ath12k_debug_mask & mask) \
64 __ath12k_dbg(ar, mask, fmt, ##__VA_ARGS__); \
52 ath12k_dbg_dump(struct ath12k_base *ab, enum ath12k_debug_mask mask, const char *msg, const char *prefix, const void *buf, size_t len) argument
/linux-master/include/linux/pds/
H A Dpds_intr.h25 * @mask: Interrupt mask. When @mask=1 the interrupt
27 * @mask=0 the interrupt resource will send an
43 * the interrupt resource will set mask=0.
49 * @mask_on_assert: Automatically mask on assertion. When
51 * will set @mask=1 whenever an interrupt is
67 u32 mask; member in struct:pds_core_intr
90 * enum pds_core_intr_mask_vals - valid values for mask and mask_assert.
92 * @PDS_CORE_INTR_MASK_SET: mask interrup
123 pds_core_intr_mask(struct pds_core_intr __iomem *intr_ctrl, u32 mask) argument
158 pds_core_intr_mask_assert(struct pds_core_intr __iomem *intr_ctrl, u32 mask) argument
[all...]
/linux-master/arch/x86/kernel/apic/
H A Dlocal.h54 void __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest);
58 void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector);
59 void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, int vector);
65 void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector);
66 void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector);
67 void default_send_IPI_mask_logical(const struct cpumask *mask, int vector);
/linux-master/drivers/gpu/drm/lima/
H A Dlima_bcast.c18 int i, mask = bcast_read(LIMA_BCAST_BROADCAST_MASK) & 0xffff0000; local
23 mask |= 1 << (pp->id - lima_ip_pp0);
26 bcast_write(LIMA_BCAST_BROADCAST_MASK, mask);
31 bcast_write(LIMA_BCAST_BROADCAST_MASK, ip->data.mask << 16);
32 bcast_write(LIMA_BCAST_INTERRUPT_MASK, ip->data.mask);
64 ip->data.mask |= 1 << (i - lima_ip_pp0);
/linux-master/drivers/gpu/drm/panthor/
H A Dpanthor_gpu.h18 u32 rdy_reg, u64 mask, u32 timeout_us);
22 u64 mask, u32 timeout_us);
29 #define panthor_gpu_power_on(ptdev, type, mask, timeout_us) \
34 mask, timeout_us)
41 #define panthor_gpu_power_off(ptdev, type, mask, timeout_us) \
45 mask, timeout_us)
/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dbrcms_trace_brcmsmac.h75 u32 mask),
76 TP_ARGS(dev, in_isr, macintstatus, mask),
81 __field(u32, mask)
87 __entry->mask = mask;
89 TP_printk("[%s] in_isr=%d macintstatus=%#x mask=%#x", __get_str(dev),
90 __entry->in_isr, __entry->macintstatus, __entry->mask)
/linux-master/drivers/clk/sprd/
H A Dpll.c71 u32 shift, mask, index, refin_id = 3; local
77 mask = pmask(pll, PLL_REFIN);
78 refin_id = (sprd_pll_read(pll, index) & mask) >> shift;
102 u32 i, mask, regs_num = pll->regs_num; local
131 mask = pmask(pll, PLL_KINT);
136 ((mask >> __ffs(mask)) + 1)) *
144 #define SPRD_PLL_WRITE_CHECK(pll, i, mask, val) \
145 (((sprd_pll_read(pll, i) & mask) == val) ? 0 : (-EFAULT))
153 u32 mask, shif local
[all...]
/linux-master/arch/mips/sgi-ip30/
H A Dip30-irq.c46 u64 pending, mask, cause, error_irqs, err_reg; local
51 mask = heart_read(&heart_regs->imr[cpu]);
53 error_irqs = (pending & HEART_L4_INT_MASK & mask);
60 heart_write(mask & ~(pending), &heart_regs->imr[cpu]);
77 cpu, pending, mask, cause);
94 heart_write(mask, &heart_regs->imr[cpu]);
101 u64 pend, mask; local
105 mask = (heart_read(&heart_regs->imr[cpu]) &
108 pend &= mask;
147 unsigned long *mask local
156 unsigned long *mask = &per_cpu(irq_enable_mask, hd->cpu); local
166 unsigned long *mask = &per_cpu(irq_enable_mask, hd->cpu); local
172 ip30_set_heart_irq_affinity(struct irq_data *d, const struct cpumask *mask, bool force) argument
250 unsigned long *mask = &per_cpu(irq_enable_mask, cpu); local
266 unsigned long *mask; local
[all...]
/linux-master/sound/soc/intel/common/
H A Dsoc-acpi-intel-rpl-match.c44 .mask = BIT(0),
161 .mask = BIT(0),
166 .mask = BIT(1),
171 .mask = BIT(2),
176 .mask = BIT(3),
185 .mask = BIT(0),
190 .mask = BIT(1),
195 .mask = BIT(2),
200 .mask = BIT(3),
209 .mask
[all...]
/linux-master/net/sched/
H A Dcls_flower.c101 struct fl_flow_key mask; member in struct:fl_flow_tmplt
116 struct fl_flow_mask *mask; member in struct:cls_fl_filter
145 static unsigned short int fl_mask_range(const struct fl_flow_mask *mask) argument
147 return mask->range.end - mask->range.start;
150 static void fl_mask_update_range(struct fl_flow_mask *mask) argument
152 const u8 *bytes = (const u8 *) &mask->key;
153 size_t size = sizeof(mask->key);
169 mask->range.start = rounddown(first, sizeof(long));
170 mask
173 fl_key_get_start(struct fl_flow_key *key, const struct fl_flow_mask *mask) argument
179 fl_set_masked_key(struct fl_flow_key *mkey, struct fl_flow_key *key, struct fl_flow_mask *mask) argument
191 fl_mask_fits_tmplt(struct fl_flow_tmplt *tmplt, struct fl_flow_mask *mask) argument
208 fl_clear_masked_range(struct fl_flow_key *key, struct fl_flow_mask *mask) argument
260 __fl_lookup(struct fl_flow_mask *mask, struct fl_flow_key *mkey) argument
267 fl_lookup_range(struct fl_flow_mask *mask, struct fl_flow_key *mkey, struct fl_flow_key *key) argument
288 fl_mask_lookup(struct fl_flow_mask *mask, struct fl_flow_key *key) argument
322 struct fl_flow_mask *mask; local
369 fl_mask_free(struct fl_flow_mask *mask, bool mask_init_done) argument
381 struct fl_flow_mask *mask = container_of(to_rcu_work(work), local
389 struct fl_flow_mask *mask = container_of(to_rcu_work(work), local
395 fl_mask_put(struct cls_fl_head *head, struct fl_flow_mask *mask) argument
593 struct fl_flow_mask *mask, *next_mask; local
797 fl_set_key_val(struct nlattr **tb, void *val, int val_type, void *mask, int mask_type, int len) argument
810 fl_set_key_spi(struct nlattr **tb, struct fl_flow_key *key, struct fl_flow_key *mask, struct netlink_ext_ack *extack) argument
828 fl_set_key_port_range(struct nlattr **tb, struct fl_flow_key *key, struct fl_flow_key *mask, struct netlink_ext_ack *extack) argument
1103 fl_set_key_pppoe(struct nlattr **tb, struct flow_dissector_key_pppoe *key_val, struct flow_dissector_key_pppoe *key_mask, struct fl_flow_key *key, struct fl_flow_key *mask) argument
1161 u32 key, mask; local
1184 fl_set_key_ip(struct nlattr **tb, bool encap, struct flow_dissector_key_ip *key, struct flow_dissector_key_ip *mask) argument
1468 fl_set_enc_opt(struct nlattr **tb, struct fl_flow_key *key, struct fl_flow_key *mask, struct netlink_ext_ack *extack) argument
1707 fl_set_key_ct(struct nlattr **tb, struct flow_dissector_key_ct *key, struct flow_dissector_key_ct *mask, struct netlink_ext_ack *extack) argument
1761 is_vlan_key(struct nlattr *tb, __be16 *ethertype, struct fl_flow_key *key, struct fl_flow_key *mask, int vthresh) argument
1781 fl_set_key_cfm_md_level(struct nlattr **tb, struct fl_flow_key *key, struct fl_flow_key *mask, struct netlink_ext_ack *extack) argument
1796 fl_set_key_cfm_opcode(struct nlattr **tb, struct fl_flow_key *key, struct fl_flow_key *mask, struct netlink_ext_ack *extack) argument
1806 fl_set_key_cfm(struct nlattr **tb, struct fl_flow_key *key, struct fl_flow_key *mask, struct netlink_ext_ack *extack) argument
1828 fl_set_key(struct net *net, struct nlattr **tb, struct fl_flow_key *key, struct fl_flow_key *mask, struct netlink_ext_ack *extack) argument
2085 fl_init_mask_hashtable(struct fl_flow_mask *mask) argument
2114 fl_init_dissector(struct flow_dissector *dissector, struct fl_flow_key *mask) argument
2182 fl_create_new_mask(struct cls_fl_head *head, struct fl_flow_mask *mask) argument
2228 fl_check_assign_mask(struct cls_fl_head *head, struct cls_fl_filter *fnew, struct cls_fl_filter *fold, struct fl_flow_mask *mask) argument
2278 fl_needs_tc_skb_ext(const struct fl_flow_key *mask) argument
2287 struct fl_flow_mask *mask = fnew->mask; local
2316 struct fl_flow_mask *mask; local
2826 fl_dump_key_val(struct sk_buff *skb, void *val, int val_type, void *mask, int mask_type, int len) argument
2845 fl_dump_key_port_range(struct sk_buff *skb, struct fl_flow_key *key, struct fl_flow_key *mask) argument
3001 fl_dump_key_ip(struct sk_buff *skb, bool encap, struct flow_dissector_key_ip *key, struct flow_dissector_key_ip *mask) argument
3054 u32 key, mask; local
3223 fl_dump_key_ct(struct sk_buff *skb, struct flow_dissector_key_ct *key, struct flow_dissector_key_ct *mask) argument
3257 fl_dump_key_cfm(struct sk_buff *skb, struct flow_dissector_key_cfm *key, struct flow_dissector_key_cfm *mask) argument
3357 fl_dump_key(struct sk_buff *skb, struct net *net, struct fl_flow_key *key, struct fl_flow_key *mask) argument
3606 struct fl_flow_key *key, *mask; local
3704 struct fl_flow_key *key, *mask; local
[all...]
/linux-master/drivers/platform/x86/
H A Dmlx-platform.c394 .mask = MLXPLAT_CPLD_I2C_CAP_MASK,
409 .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX,
649 .mask = BIT(0),
655 .mask = BIT(1),
665 .mask = BIT(0),
671 .mask = BIT(1),
680 .mask = BIT(0),
687 .mask = BIT(1),
697 .mask = BIT(0),
703 .mask
[all...]

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