Searched refs:iobase (Results 76 - 100 of 282) sorted by relevance

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/linux-master/drivers/comedi/drivers/
H A Daddi_apci_1516.c72 data[1] = inw(dev->iobase + APCI1516_DI_REG);
82 s->state = inw(dev->iobase + APCI1516_DO_REG);
85 outw(s->state, dev->iobase + APCI1516_DO_REG);
100 outw(0x0, dev->iobase + APCI1516_DO_REG);
131 dev->iobase = pci_resource_start(pcidev, 1);
180 if (dev->iobase)
H A Dadl_pci6208.c48 status = inw(dev->iobase + PCI6208_AO_STATUS);
73 dev->iobase + PCI6208_AO_CONTROL(chan));
88 val = inw(dev->iobase + PCI6208_DIO);
102 outw(s->state, dev->iobase + PCI6208_DIO);
120 dev->iobase = pci_resource_start(pcidev, 2);
161 val = inw(dev->iobase + PCI6208_DIO);
H A Dadl_pci9111.c157 flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
170 outb(flags, dev->iobase + PCI9111_INT_CTRL_REG);
175 unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG;
193 outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
351 outb(last_chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
354 outb(PCI9111_AI_RANGE(range0), dev->iobase + PCI9111_AI_RANGE_STAT_REG);
380 outb(trig, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
414 insw(dev->iobase + PCI9111_AI_FIFO_REG, buf, samples);
485 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
491 outb(0, dev->iobase
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H A Dcontec_pci_dio.c35 outw(s->state, dev->iobase + PIO1616L_DO_REG);
46 data[1] = inw(dev->iobase + PIO1616L_DI_REG);
61 dev->iobase = pci_resource_start(pcidev, 0);
H A Drti802.c50 outb(chan, dev->iobase + RTI802_SELECT);
61 outb(val & 0xff, dev->iobase + RTI802_DATALOW);
62 outb((val >> 8) & 0xff, dev->iobase + RTI802_DATAHIGH);
H A Damplc_pci236.c89 unsigned long iobase; local
106 iobase = pci_resource_start(pci_dev, 2);
107 return amplc_pc236_common_attach(dev, iobase, pci_dev->irq,
H A Ddt2801.c233 stat = inb_p(dev->iobase + DT2801_STATUS);
237 *data = inb_p(dev->iobase + DT2801_DATA);
268 stat = inb_p(dev->iobase + DT2801_STATUS);
273 outb_p(data & 0xff, dev->iobase + DT2801_DATA);
300 stat = inb_p(dev->iobase + DT2801_STATUS);
304 stat = inb_p(dev->iobase + DT2801_STATUS);
321 stat = inb_p(dev->iobase + DT2801_STATUS);
328 outb_p(command, dev->iobase + DT2801_CMD);
338 inb_p(dev->iobase + DT2801_DATA);
339 inb_p(dev->iobase
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H A Dpcmad.c61 status = inb(dev->iobase + PCMAD_STATUS);
79 outb(chan, dev->iobase + PCMAD_CONVERT);
85 val = inb(dev->iobase + PCMAD_LSB) |
86 (inb(dev->iobase + PCMAD_MSB) << 8);
H A Daddi_apci_3120.c28 * PCI BAR 1 register map (dev->iobase)
310 inb(dev->iobase + APCI3120_CTR0_REG);
321 dev->iobase + APCI3120_CTR0_REG);
322 outw(val & 0xffff, dev->iobase + APCI3120_TIMER_REG);
328 dev->iobase + APCI3120_CTR0_REG);
329 outw((val >> 16) & 0xffff, dev->iobase + APCI3120_TIMER_REG);
342 dev->iobase + APCI3120_CTR0_REG);
343 val = inw(dev->iobase + APCI3120_TIMER_REG);
349 dev->iobase + APCI3120_CTR0_REG);
350 val |= (inw(dev->iobase
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H A Dpcl818.c327 outb(chan, dev->iobase + PCL818_MUX_REG);
328 outb(range, dev->iobase + PCL818_RANGE_REG);
336 dev->iobase + PCL818_MUX_REG);
370 outb(0, dev->iobase + PCL818_STATUS_REG);
376 outb(0, dev->iobase + PCL818_AI_LSB_REG);
385 val = inb(dev->iobase + PCL818_FI_DATALO);
386 val |= (inb(dev->iobase + PCL818_FI_DATAHI) << 8);
400 val = inb(dev->iobase + PCL818_AI_MSB_REG) << 8;
401 val |= inb(dev->iobase + PCL818_AI_LSB_REG);
416 status = inb(dev->iobase
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H A Ddas16m1.c50 * Register map (dev->iobase)
114 outb(i, dev->iobase + DAS16M1_Q_ADDR_REG);
116 dev->iobase + DAS16M1_Q_REG);
284 outb(byte, dev->iobase + DAS16M1_CS_REG);
287 outb(0, dev->iobase + DAS16M1_CLR_INTR_REG);
290 outb(devpriv->intr_ctrl, dev->iobase + DAS16M1_INTR_CTRL_REG);
303 outb(devpriv->intr_ctrl, dev->iobase + DAS16M1_INTR_CTRL_REG);
315 status = inb(dev->iobase + DAS16M1_CS_REG);
335 outb(0, dev->iobase + DAS16M1_CLR_INTR_REG);
337 outb(0, dev->iobase
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H A Ddas16.c540 outb(first_chan | (last_chan << 4), dev->iobase + DAS16_MUX_REG);
552 dev->iobase + DAS16_GAIN_REG);
712 outb(DAS1600_CONV_DISABLE, dev->iobase + DAS1600_CONV_REG);
725 dev->iobase + DAS1600_BURST_REG);
729 outb(0, dev->iobase + DAS1600_BURST_REG);
732 outb(byte, dev->iobase + DAS16_PACER_REG);
751 outb(devpriv->ctrl_reg, dev->iobase + DAS16_CTRL_REG);
754 outb(0, dev->iobase + DAS1600_CONV_REG);
771 outb(devpriv->ctrl_reg, dev->iobase + DAS16_CTRL_REG);
782 outb(0, dev->iobase
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H A Dpcl816.c138 outb(chan, dev->iobase + PCL816_MUX_REG);
139 outb(range, dev->iobase + PCL816_RANGE_REG);
147 dev->iobase + PCL816_MUX_REG);
175 outb(0, dev->iobase + PCL816_CLRINT_REG);
181 outb(0, dev->iobase + PCL816_AI_LSB_REG);
189 val = inb(dev->iobase + PCL816_AI_MSB_REG) << 8;
190 val |= inb(dev->iobase + PCL816_AI_LSB_REG);
202 status = inb(dev->iobase + PCL816_STATUS_REG);
441 outb(ctrl, dev->iobase + PCL816_CTRL_REG);
443 dev->iobase
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H A Ddas08_pci.c60 dev->iobase = pci_resource_start(pdev, 2);
62 return das08_common_attach(dev, dev->iobase);
H A Dpcl730.c223 outb(s->state & 0xff, dev->iobase + reg);
225 outb((s->state >> 8) & 0xff, dev->iobase + reg + 1);
227 outb((s->state >> 16) & 0xff, dev->iobase + reg + 2);
229 outb((s->state >> 24) & 0xff, dev->iobase + reg + 3);
243 val = inb(dev->iobase + reg);
245 val |= (inb(dev->iobase + reg + 1) << 8);
247 val |= (inb(dev->iobase + reg + 2) << 16);
249 val |= (inb(dev->iobase + reg + 3) << 24);
/linux-master/drivers/spi/
H A Dspi-cadence-xspi.c212 void __iomem *iobase; member in struct:cdns_xspi_dev
235 return readl_relaxed_poll_timeout(cdns_xspi->iobase +
246 writel(cmd_regs[5], cdns_xspi->iobase + CDNS_XSPI_CMD_REG_5);
247 writel(cmd_regs[4], cdns_xspi->iobase + CDNS_XSPI_CMD_REG_4);
248 writel(cmd_regs[3], cdns_xspi->iobase + CDNS_XSPI_CMD_REG_3);
249 writel(cmd_regs[2], cdns_xspi->iobase + CDNS_XSPI_CMD_REG_2);
250 writel(cmd_regs[1], cdns_xspi->iobase + CDNS_XSPI_CMD_REG_1);
251 writel(cmd_regs[0], cdns_xspi->iobase + CDNS_XSPI_CMD_REG_0);
257 u32 cmd_status = readl(cdns_xspi->iobase + CDNS_XSPI_CMD_STATUS_REG);
295 intr_enable = readl(cdns_xspi->iobase
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H A Dspi-nxp-fspi.c380 void __iomem *iobase; member in struct:nxp_fspi
429 reg = fspi_readl(f, f->iobase + FSPI_INTR);
430 fspi_writel(f, FSPI_INTR_IPCMDDONE, f->iobase + FSPI_INTR);
532 reg = fspi_readl(f, f->iobase + FSPI_MCR0);
533 fspi_writel(f, reg | FSPI_MCR0_SWRST, f->iobase + FSPI_MCR0);
536 ret = fspi_readl_poll_tout(f, f->iobase + FSPI_MCR0,
544 void __iomem *base = f->iobase;
587 fspi_writel(f, FSPI_LUTKEY_VALUE, f->iobase + FSPI_LUTKEY);
588 fspi_writel(f, FSPI_LCKER_UNLOCK, f->iobase + FSPI_LCKCR);
598 fspi_writel(f, FSPI_LUTKEY_VALUE, f->iobase
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/linux-master/drivers/tty/serial/8250/
H A D8250_hub6.c12 .iobase = 0x302, \
H A D8250_pcilib.c26 port->port.iobase = 0;
32 port->port.iobase = pci_resource_start(dev, bar) + offset;
/linux-master/include/linux/
H A Dyam.h46 unsigned int iobase; /* IO Base of COM port */ member in struct:yamcfg
/linux-master/drivers/misc/cardreader/
H A Dalcor_pci.c58 writeb(val, priv->iobase + addr);
64 writew(val, priv->iobase + addr);
70 writel(val, priv->iobase + addr);
76 iowrite32be(val, priv->iobase + addr);
82 return readb(priv->iobase + addr);
88 return readl(priv->iobase + addr);
94 return ioread32be(priv->iobase + addr);
139 priv->iobase = pcim_iomap(pdev, bar, 0);
140 if (!priv->iobase) {
/linux-master/sound/pci/
H A Dals4000.c96 unsigned long iobase; member in struct:snd_card_als4000
176 static inline void snd_als4k_iobase_writeb(unsigned long iobase, argument
180 outb(val, iobase + reg);
183 static inline void snd_als4k_iobase_writel(unsigned long iobase, argument
187 outl(val, iobase + reg);
190 static inline u8 snd_als4k_iobase_readb(unsigned long iobase, argument
193 return inb(iobase + reg);
196 static inline u32 snd_als4k_iobase_readl(unsigned long iobase, argument
199 return inl(iobase + reg);
202 static inline void snd_als4k_gcr_write_addr(unsigned long iobase, argument
217 snd_als4k_gcr_read_addr(unsigned long iobase, enum als4k_gcr_t reg) argument
685 snd_als4000_set_addr(unsigned long iobase, unsigned int sb_io, unsigned int mpu_io, unsigned int opl_io, unsigned int game_io) argument
815 unsigned long iobase; local
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/linux-master/drivers/staging/vt6655/
H A Dmac.c40 void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) argument
44 reg_value = ioread8(iobase + reg_offset);
45 iowrite8(reg_value | bit_mask, iobase + reg_offset);
48 void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask) argument
52 reg_value = ioread16(iobase + reg_offset);
53 iowrite16(reg_value | (bit_mask), iobase + reg_offset);
56 void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask) argument
60 reg_value = ioread8(iobase + reg_offset);
61 iowrite8(reg_value & ~(bit_mask), iobase + reg_offset);
64 void vt6655_mac_word_reg_bits_off(void __iomem *iobase, cons argument
72 vt6655_mac_clear_stck_ds(void __iomem *iobase) argument
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H A Drf.c160 * iobase - I/O base address
170 void __iomem *iobase = priv->port_offset; local
174 iowrite32((u32)dwData, iobase + MAC_REG_IFREGCTL);
178 dwValue = ioread32(iobase + MAC_REG_IFREGCTL);
194 * iobase - I/O base address
203 void __iomem *iobase = priv->port_offset; local
210 iowrite8(0, iobase + MAC_REG_SOFTPWRCTL);
212 vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL,
215 vt6655_mac_word_reg_bits_off(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
225 vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCT
248 void __iomem *iobase = priv->port_offset; local
347 void __iomem *iobase = priv->port_offset; local
[all...]
/linux-master/arch/arm/mach-footbridge/
H A Disa.c50 .iobase = 0x3f8,
58 .iobase = 0x2f8,

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