/linux-master/drivers/dma/idxd/ |
H A D | defaults.c | 8 struct idxd_engine *engine; local 46 engine = idxd->engines[0]; 48 /* set engine group to 0 */ 49 engine->group = idxd->groups[0]; 50 engine->group->num_engines++;
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/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_lrc.h | 33 void lrc_init_wa_ctx(struct intel_engine_cs *engine); 34 void lrc_fini_wa_ctx(struct intel_engine_cs *engine); 37 struct intel_engine_cs *engine); 44 struct intel_engine_cs *engine, 49 struct intel_engine_cs *engine, 55 struct intel_engine_cs *engine, 59 const struct intel_engine_cs *engine, 62 const struct intel_engine_cs *engine); 65 const struct intel_engine_cs *engine, 68 struct intel_engine_cs *engine); [all...] |
H A D | selftest_execlists.c | 24 #define CS_GPR(engine, n) ((engine)->mmio_base + 0x600 + (n) * 4) 42 static int wait_for_submit(struct intel_engine_cs *engine, argument 47 tasklet_hi_schedule(&engine->sched_engine->tasklet); 57 intel_engine_flush_submission(engine); 58 if (!READ_ONCE(engine->execlists.pending[0]) && is_active(rq)) 68 static int wait_for_reset(struct intel_engine_cs *engine, argument 76 intel_engine_flush_submission(engine); 78 if (READ_ONCE(engine->execlists.pending[0])) 90 engine 112 struct intel_engine_cs *engine; local 166 struct intel_engine_cs *engine; local 328 struct intel_engine_cs *engine; local 478 struct intel_engine_cs *engine; local 553 engine_lock_reset_tasklet(struct intel_engine_cs *engine) argument 570 engine_unlock_reset_tasklet(struct intel_engine_cs *engine) argument 582 struct intel_engine_cs *engine; local 689 struct intel_engine_cs *engine; local 857 semaphore_queue(struct intel_engine_cs *engine, struct i915_vma *vma, int idx) argument 888 release_queue(struct intel_engine_cs *engine, struct i915_vma *vma, int idx, int prio) argument 932 struct intel_engine_cs *engine; local 980 struct intel_engine_cs *engine; local 1114 struct intel_engine_cs *engine; local 1257 nop_request(struct intel_engine_cs *engine) argument 1271 slice_timeout(struct intel_engine_cs *engine) argument 1288 struct intel_engine_cs *engine; local 1413 struct intel_engine_cs *engine; local 1529 struct intel_engine_cs *engine; local 1715 spinner_create_request(struct igt_spinner *spin, struct i915_gem_context *ctx, struct intel_engine_cs *engine, u32 arb) argument 1737 struct intel_engine_cs *engine; local 1828 struct intel_engine_cs *engine; local 1956 struct intel_engine_cs *engine; local 2052 struct intel_engine_cs *engine; member in struct:live_preempt_cancel 2311 force_reset_timeout(struct intel_engine_cs *engine) argument 2317 cancel_reset_timeout(struct intel_engine_cs *engine) argument 2324 struct intel_engine_cs *engine = arg->engine; local 2443 struct intel_engine_cs *engine; local 2556 struct intel_engine_cs *engine; local 2701 create_gang(struct intel_engine_cs *engine, struct i915_request **prev) argument 2796 __live_preempt_ring(struct intel_engine_cs *engine, struct igt_spinner *spin, int queue_sz, int ring_sz) argument 2917 struct intel_engine_cs *engine; local 2961 struct intel_engine_cs *engine; local 3047 create_gpr_user(struct intel_engine_cs *engine, struct i915_vma *result, unsigned int offset) argument 3147 create_gpr_client(struct intel_engine_cs *engine, struct i915_vma *global, unsigned int offset) argument 3207 preempt_user(struct intel_engine_cs *engine, struct i915_vma *global, int id) argument 3250 struct intel_engine_cs *engine; local 3369 struct intel_engine_cs *engine; local 3472 struct intel_engine_cs *engine; member in struct:preempt_smoke 3559 struct intel_engine_cs *engine; local 3871 struct intel_engine_cs *engine; local 4225 struct intel_engine_cs *engine = siblings[n % nsibling]; local 4334 struct intel_engine_cs *engine; local [all...] |
H A D | selftest_engine_cs.c | 44 static i915_reg_t timestamp_reg(struct intel_engine_cs *engine) argument 46 struct drm_i915_private *i915 = engine->i915; 49 return RING_TIMESTAMP_UDW(engine->mmio_base); 51 return RING_TIMESTAMP(engine->mmio_base); 70 *cs++ = i915_mmio_reg_offset(timestamp_reg(rq->engine)); 86 obj = i915_gem_object_create_internal(ce->engine->i915, PAGE_SIZE); 136 struct intel_engine_cs *engine; local 145 for_each_engine(engine, gt, id) { 146 struct intel_context *ce = engine->kernel_context; 151 if (GRAPHICS_VER(engine 264 struct intel_engine_cs *engine; local [all...] |
H A D | intel_gt_irq.h | 44 static inline void intel_engine_cs_irq(struct intel_engine_cs *engine, u16 iir) argument 47 engine->irq_handler(engine, iir); 51 intel_engine_set_irq_handler(struct intel_engine_cs *engine, argument 52 void (*fn)(struct intel_engine_cs *engine, 59 * the engine, we will receive interrupts only to ourselves, 62 smp_store_mb(engine->irq_handler, fn);
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H A D | intel_gt_requests.c | 29 static bool engine_active(const struct intel_engine_cs *engine) argument 31 return !list_empty(&engine->kernel_context->timeline->requests); 36 struct intel_engine_cs *engine; local 46 for_each_engine(engine, gt, id) { 47 intel_engine_flush_submission(engine); 50 flush_work(&engine->retire_work); 51 flush_delayed_work(&engine->wakeref.work); 54 active |= engine_active(engine); 62 struct intel_engine_cs *engine = local 63 container_of(work, typeof(*engine), retire_wor 88 add_retire(struct intel_engine_cs *engine, struct intel_timeline *tl) argument 112 intel_engine_add_retire(struct intel_engine_cs *engine, struct intel_timeline *tl) argument 122 intel_engine_init_retire(struct intel_engine_cs *engine) argument 127 intel_engine_fini_retire(struct intel_engine_cs *engine) argument [all...] |
H A D | selftest_lrc.c | 26 #define CS_GPR(engine, n) ((engine)->mmio_base + 0x600 + (n) * 4) 52 static int wait_for_submit(struct intel_engine_cs *engine, argument 57 tasklet_hi_schedule(&engine->sched_engine->tasklet); 67 intel_engine_flush_submission(engine); 68 if (!READ_ONCE(engine->execlists.pending[0]) && is_active(rq)) 81 i915_ggtt_offset(ce->engine->status_page.vma) + 114 rq = intel_engine_create_kernel_request(ce->engine); 134 static int get_lri_mask(struct intel_engine_cs *engine, u32 lri) argument 139 if (GRAPHICS_VER(engine 158 struct intel_engine_cs *engine; local 189 engine->kernel_context, engine, true); local 288 struct intel_engine_cs *engine; local 402 __live_lrc_state(struct intel_engine_cs *engine, struct i915_vma *scratch) argument 505 struct intel_engine_cs *engine; local 614 __live_lrc_gpr(struct intel_engine_cs *engine, struct i915_vma *scratch, bool preempt) argument 699 struct intel_engine_cs *engine; local 787 struct intel_engine_cs *engine; member in struct:lrc_timestamp 1261 compare_isolation(struct intel_engine_cs *engine, struct i915_vma *ref[2], struct i915_vma *result[2], struct intel_context *ce, u32 poison) argument 1401 __lrc_isolation(struct intel_engine_cs *engine, u32 poison) argument 1495 skip_isolation(const struct intel_engine_cs *engine) argument 1509 struct intel_engine_cs *engine; local 1653 __lrc_wabb_ctx(struct intel_engine_cs *engine, bool per_ctx) argument 1712 struct intel_engine_cs *engine; local 1741 garbage_reset(struct intel_engine_cs *engine, struct i915_request *rq) argument 1790 __lrc_garbage(struct intel_engine_cs *engine, struct rnd_state *prng) argument 1841 struct intel_engine_cs *engine; local 1876 __live_pphwsp_runtime(struct intel_engine_cs *engine) argument 1945 struct intel_engine_cs *engine; local [all...] |
H A D | selftest_rps.c | 57 create_spin_counter(struct intel_engine_cs *engine, argument 68 #define CS_GPR(x) GEN8_RING_CS_GPR(engine->mmio_base, x) 224 struct intel_engine_cs *engine; local 245 for_each_engine(engine, gt, id) { 250 if (!intel_engine_can_store_dword(engine)) 253 st_engine_heartbeat_disable(engine); 256 engine->kernel_context, 259 st_engine_heartbeat_enable(engine); 268 engine->name); 270 st_engine_heartbeat_enable(engine); 377 struct intel_engine_cs *engine; local 567 __measure_cs_frequency(struct intel_engine_cs *engine, int duration_ms) argument 581 measure_cs_frequency_at(struct intel_rps *rps, struct intel_engine_cs *engine, int *freq) argument 608 struct intel_engine_cs *engine; local 747 struct intel_engine_cs *engine; local 894 __rps_up_interrupt(struct intel_rps *rps, struct intel_engine_cs *engine, struct igt_spinner *spin) argument 972 __rps_down_interrupt(struct intel_rps *rps, struct intel_engine_cs *engine) argument 1025 struct intel_engine_cs *engine; local 1136 struct intel_engine_cs *engine; local 1239 struct intel_engine_cs *engine; local [all...] |
H A D | gen6_engine_cs.c | 58 intel_gt_scratch_offset(rq->engine->gt, 92 intel_gt_scratch_offset(rq->engine->gt, 153 *cs++ = intel_gt_scratch_offset(rq->engine->gt, 197 * Bspec vol 1c.3 - blitter engine command streamer: 292 intel_gt_scratch_offset(rq->engine->gt, 377 GEM_BUG_ON(i915_request_active_timeline(rq)->hwsp_ggtt != rq->engine->status_page.vma); 397 GEM_BUG_ON(i915_request_active_timeline(rq)->hwsp_ggtt != rq->engine->status_page.vma); 425 void gen6_irq_enable(struct intel_engine_cs *engine) argument 427 ENGINE_WRITE(engine, RING_IMR, 428 ~(engine 436 gen6_irq_disable(struct intel_engine_cs *engine) argument 442 hsw_irq_enable_vecs(struct intel_engine_cs *engine) argument 452 hsw_irq_disable_vecs(struct intel_engine_cs *engine) argument [all...] |
H A D | intel_breadcrumbs.h | 37 intel_engine_signal_breadcrumbs(struct intel_engine_cs *engine) argument 39 irq_work_queue(&engine->breadcrumbs->irq_work); 42 void intel_engine_print_breadcrumbs(struct intel_engine_cs *engine,
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H A D | intel_workarounds.c | 41 * engine is reset. It's also possible that a set of engine classes share a 45 * driver is to tie those workarounds to the first compute/render engine that 46 * is registered. When executing with GuC submission, engine resets are 48 * written once, on engine initialization, and then passed to GuC, that 56 * engine's MMIO range but that are part of of the common RCS/CCS reset domain 88 * engine registers are restored in a context restore sequence. This is 337 static void gen6_ctx_workarounds_init(struct intel_engine_cs *engine, argument 343 static void gen7_ctx_workarounds_init(struct intel_engine_cs *engine, argument 349 static void gen8_ctx_workarounds_init(struct intel_engine_cs *engine, argument 397 bdw_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 425 chv_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 437 gen9_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 533 skl_tune_iz_hashing(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 573 skl_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 580 bxt_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 594 kbl_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 611 glk_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 621 cfl_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 635 icl_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 679 dg2_ctx_gt_tuning_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 689 gen12_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 747 dg1_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 761 dg2_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 783 xelpg_ctx_gt_tuning_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 800 xelpg_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 831 fakewa_disable_nestedbb_mode(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 862 gen12_ctx_gt_mocs_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 888 gen12_ctx_gt_fake_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 898 __intel_engine_init_ctx_wa(struct intel_engine_cs *engine, struct i915_wa_list *wal, const char *name) argument 954 intel_engine_init_ctx_wa(struct intel_engine_cs *engine) argument 1448 struct intel_engine_cs *engine; local 1570 struct intel_engine_cs *engine; local 1869 skl_whitelist_build(struct intel_engine_cs *engine) argument 1882 bxt_whitelist_build(struct intel_engine_cs *engine) argument 1890 kbl_whitelist_build(struct intel_engine_cs *engine) argument 1903 glk_whitelist_build(struct intel_engine_cs *engine) argument 1916 cfl_whitelist_build(struct intel_engine_cs *engine) argument 1939 allow_read_ctx_timestamp(struct intel_engine_cs *engine) argument 1949 cml_whitelist_build(struct intel_engine_cs *engine) argument 1956 icl_whitelist_build(struct intel_engine_cs *engine) argument 2004 tgl_whitelist_build(struct intel_engine_cs *engine) argument 2045 dg2_whitelist_build(struct intel_engine_cs *engine) argument 2060 xelpg_whitelist_build(struct intel_engine_cs *engine) argument 2075 intel_engine_init_whitelist(struct intel_engine_cs *engine) argument 2112 intel_engine_apply_whitelist(struct intel_engine_cs *engine) argument 2143 engine_fake_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 2180 rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 2648 xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 2666 ccs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 2705 ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 2739 general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 2849 engine_init_workarounds(struct intel_engine_cs *engine, struct i915_wa_list *wal) argument 2874 intel_engine_init_workarounds(struct intel_engine_cs *engine) argument 2883 intel_engine_apply_workarounds(struct intel_engine_cs *engine) argument 3081 intel_engine_verify_workarounds(struct intel_engine_cs *engine, const char *from) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | aux_engine.h | 155 struct aux_engine *engine); 157 struct aux_engine *engine, 160 struct aux_engine *engine, 163 struct aux_engine *engine, 166 struct aux_engine *engine, 172 struct aux_engine *engine, 174 bool (*is_engine_available)(struct aux_engine *engine); 176 struct aux_engine *engine, 179 struct aux_engine *engine, 183 struct aux_engine *engine); [all...] |
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/engine/ |
H A D | sw.h | 4 #include <core/engine.h> 8 struct nvkm_engine engine; member in struct:nvkm_sw
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/linux-master/drivers/gpu/drm/i915/selftests/ |
H A D | intel_scheduler_helpers.h | 28 int intel_selftest_modify_policy(struct intel_engine_cs *engine, 31 int intel_selftest_restore_policy(struct intel_engine_cs *engine,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sw/ |
H A D | priv.h | 4 #define nvkm_sw(p) container_of((p), struct nvkm_sw, engine) 5 #include <engine/sw.h>
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H A D | chan.c | 26 #include <engine/fifo.h> 64 spin_lock_irqsave(&sw->engine.lock, flags); 66 spin_unlock_irqrestore(&sw->engine.lock, flags); 86 spin_lock_irqsave(&sw->engine.lock, flags); 88 spin_unlock_irqrestore(&sw->engine.lock, flags); 90 return nvkm_event_init(&nvkm_sw_chan_event, &sw->engine.subdev, 1, 1, &chan->event);
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H A D | base.c | 27 #include <engine/fifo.h> 36 spin_lock_irqsave(&sw->engine.lock, flags); 45 spin_unlock_irqrestore(&sw->engine.lock, flags); 61 struct nvkm_sw *sw = nvkm_sw(oclass->engine); 80 struct nvkm_sw *sw = nvkm_sw(oclass->engine); 85 nvkm_sw_dtor(struct nvkm_engine *engine) argument 87 return nvkm_sw(engine); 108 return nvkm_engine_ctor(&nvkm_sw, device, type, inst, true, &sw->engine);
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/linux-master/drivers/crypto/marvell/cesa/ |
H A D | tdma.c | 39 struct mv_cesa_engine *engine = dreq->engine; local 41 writel_relaxed(0, engine->regs + CESA_SA_CFG); 43 mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE); 46 engine->regs + CESA_TDMA_CONTROL); 50 engine->regs + CESA_SA_CFG); 52 engine->regs + CESA_TDMA_NEXT_ADDR); 53 WARN_ON(readl(engine->regs + CESA_SA_CMD) & 55 writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD); 80 struct mv_cesa_engine *engine) 79 mv_cesa_dma_prepare(struct mv_cesa_req *dreq, struct mv_cesa_engine *engine) argument 96 mv_cesa_tdma_chain(struct mv_cesa_engine *engine, struct mv_cesa_req *dreq) argument 121 mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status) argument 354 mv_cesa_sg_copy(struct mv_cesa_engine *engine, struct scatterlist *sgl, unsigned int nents, unsigned int sram_off, size_t buflen, off_t skip, bool to_sram) argument [all...] |
/linux-master/drivers/soc/qcom/ |
H A D | ice.c | 37 #define qcom_ice_writel(engine, val, reg) \ 38 writel((val), (engine)->base + (reg)) 40 #define qcom_ice_readl(engine, reg) \ 41 readl((engine)->base + (reg)) 211 struct qcom_ice *engine; local 221 engine = devm_kzalloc(dev, sizeof(*engine), GFP_KERNEL); 222 if (!engine) 225 engine->dev = dev; 226 engine 333 struct qcom_ice *engine; local [all...] |
/linux-master/drivers/accel/ivpu/ |
H A D | ivpu_jsm_msg.h | 16 int ivpu_jsm_get_heartbeat(struct ivpu_device *vdev, u32 engine, u64 *heartbeat); 17 int ivpu_jsm_reset_engine(struct ivpu_device *vdev, u32 engine); 18 int ivpu_jsm_preempt_engine(struct ivpu_device *vdev, u32 engine, u32 preempt_id);
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/dma/ |
H A D | base.c | 27 #include <engine/fifo.h> 36 struct nvkm_dma *dma = nvkm_dma(oclass->engine); 55 return nvkm_dma_oclass_new(oclass->engine->subdev.device, 93 nvkm_dma_dtor(struct nvkm_engine *engine) argument 95 return nvkm_dma(engine); 115 return nvkm_engine_ctor(&nvkm_dma, device, type, inst, true, &dma->engine);
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/linux-master/drivers/gpu/drm/sun4i/ |
H A D | sun4i_crtc.c | 54 struct sunxi_engine *engine = scrtc->engine; local 57 if (engine && engine->ops && engine->ops->atomic_check) 58 ret = engine->ops->atomic_check(engine, crtc_state); 70 struct sunxi_engine *engine = scrtc->engine; local 82 if (engine 192 sun4i_crtc_init(struct drm_device *drm, struct sunxi_engine *engine, struct sun4i_tcon *tcon) argument [all...] |
/linux-master/drivers/gpu/drm/i915/gvt/ |
H A D | mmio_context.c | 174 static void load_render_mocs(const struct intel_engine_cs *engine) argument 176 struct intel_gvt *gvt = engine->i915->gvt; 177 struct intel_uncore *uncore = engine->uncore; 188 if (!HAS_ENGINE(engine->gt, ring_id)) 216 int ring_id = req->engine->id; 222 ret = req->engine->emit_flush(req, EMIT_BARRIER); 245 ret = req->engine->emit_flush(req, EMIT_BARRIER); 269 *(cs-2), *(cs-1), vgpu->id, req->engine->id); 296 *(cs-2), *(cs-1), vgpu->id, req->engine->id); 308 * inhibit context, it contains tracked engine mmi 361 handle_tlb_pending_event(struct intel_vgpu *vgpu, const struct intel_engine_cs *engine) argument 407 switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next, const struct intel_engine_cs *engine) argument 481 switch_mmio(struct intel_vgpu *pre, struct intel_vgpu *next, const struct intel_engine_cs *engine) argument 566 intel_gvt_switch_mmio(struct intel_vgpu *pre, struct intel_vgpu *next, const struct intel_engine_cs *engine) argument [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ |
H A D | xtensa.c | 22 #include <engine/xtensa.h> 25 #include <engine/fifo.h> 30 struct nvkm_xtensa *xtensa = nvkm_xtensa(oclass->engine); 47 return nvkm_gpuobj_new(object->engine->subdev.device, 0x10000, align, 57 nvkm_xtensa_intr(struct nvkm_engine *engine) argument 59 struct nvkm_xtensa *xtensa = nvkm_xtensa(engine); 60 struct nvkm_subdev *subdev = &xtensa->engine.subdev; 69 nvkm_warn(subdev, "Watchdog interrupt, engine hung.\n"); 79 nvkm_xtensa_fini(struct nvkm_engine *engine, bool suspend) argument 81 struct nvkm_xtensa *xtensa = nvkm_xtensa(engine); 94 nvkm_xtensa_init(struct nvkm_engine *engine) argument 162 nvkm_xtensa_dtor(struct nvkm_engine *engine) argument [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/ |
H A D | nv44.c | 24 #define nv44_mpeg(p) container_of((p), struct nv44_mpeg, engine) 29 #include <engine/fifo.h> 34 struct nvkm_engine engine; member in struct:nv44_mpeg 56 int ret = nvkm_gpuobj_new(chan->object.engine->subdev.device, 264 * 4, 73 struct nvkm_device *device = mpeg->engine.subdev.device; 89 spin_lock_irqsave(&mpeg->engine.lock, flags); 91 spin_unlock_irqrestore(&mpeg->engine.lock, flags); 106 struct nv44_mpeg *mpeg = nv44_mpeg(oclass->engine); 117 spin_lock_irqsave(&mpeg->engine.lock, flags); 119 spin_unlock_irqrestore(&mpeg->engine 142 nv44_mpeg_intr(struct nvkm_engine *engine) argument [all...] |