/linux-master/drivers/gpu/drm/i915/gem/ |
H A D | i915_gem_busy.c | 30 * being active implies that we have set the same engine flag from 78 return flag(rq->engine->uabi_class); 92 BUILD_BUG_ON(!typecheck(u16, rq->engine->uabi_class)); 93 return flag(rq->engine->uabi_class); 152 /* Translate the write fences to the READ *and* WRITE engine */
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/linux-master/drivers/crypto/amlogic/ |
H A D | amlogic-gxl.h | 8 #include <crypto/engine.h> 61 * @engine: ptr to the crypto_engine for this flow 70 struct crypto_engine *engine; member in struct:meson_flow 161 int meson_handle_cipher_request(struct crypto_engine *engine, void *areq);
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/linux-master/drivers/accel/ivpu/ |
H A D | ivpu_jsm_msg.c | 136 int ivpu_jsm_get_heartbeat(struct ivpu_device *vdev, u32 engine, u64 *heartbeat) argument 142 if (engine > VPU_ENGINE_COPY) 145 req.payload.query_engine_hb.engine_idx = engine; 150 ivpu_err_ratelimited(vdev, "Failed to get heartbeat from engine %d: %d\n", 151 engine, ret); 159 int ivpu_jsm_reset_engine(struct ivpu_device *vdev, u32 engine) argument 165 if (engine > VPU_ENGINE_COPY) 168 req.payload.engine_reset.engine_idx = engine; 173 ivpu_err_ratelimited(vdev, "Failed to reset engine %d: %d\n", engine, re 178 ivpu_jsm_preempt_engine(struct ivpu_device *vdev, u32 engine, u32 preempt_id) argument [all...] |
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/core/ |
H A D | oclass.h | 29 struct nvkm_engine *engine; member in struct:nvkm_oclass
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/cipher/ |
H A D | g84.c | 24 #include <engine/cipher.h> 25 #include <engine/fifo.h> 37 int ret = nvkm_gpuobj_new(object->engine->subdev.device, 16, 59 return nvkm_gpuobj_new(object->engine->subdev.device, 256,
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
H A D | top.h | 17 int engine; member in struct:nvkm_top_device
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/linux-master/drivers/gpu/drm/i915/gem/selftests/ |
H A D | igt_gem_utils.h | 22 igt_request_alloc(struct i915_gem_context *ctx, struct intel_engine_cs *engine);
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H A D | i915_gem_coherency.c | 20 struct intel_engine_cs *engine; member in struct:context 210 rq = intel_engine_create_kernel_request(ctx->engine); 222 if (GRAPHICS_VER(ctx->engine->i915) >= 8) { 227 } else if (GRAPHICS_VER(ctx->engine->i915) >= 4) { 259 struct intel_gt *gt = ctx->engine->gt; 269 if (intel_gt_is_wedged(ctx->engine->gt)) 272 return intel_engine_can_store_dword(ctx->engine); 291 struct intel_engine_cs *engine; local 295 for_each_uabi_engine(engine, i915) 299 for_each_uabi_engine(engine, i91 [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ |
H A D | r535.c | 27 #include <engine/fifo.h> 76 r535_ofa_dtor(struct nvkm_engine *engine) argument 78 kfree(engine->func); 79 return engine;
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
H A D | tu102.c | 43 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; 65 struct nvkm_device *device = runl->fifo->engine.subdev.device; 73 struct nvkm_device *device = runl->fifo->engine.subdev.device; 130 .engine = tu102_fifo_mmu_fault_engine, 143 /* Check that engine hasn't become unstuck since timeout raised. */ 148 /* Determine channel group the engine is stuck on, and schedule recovery. */ 171 struct nvkm_device *device = fifo->engine.subdev.device; 190 struct nvkm_subdev *subdev = &fifo->engine.subdev; 200 struct nvkm_fifo *fifo = container_of(inth, typeof(*fifo), engine.subdev.inth); 201 struct nvkm_subdev *subdev = &fifo->engine [all...] |
H A D | runl.c | 92 nvkm_msec(fifo->engine.subdev.device, 2000, 117 WARN_ON(nvkm_engine_reset(engn->engine)); 160 /* Lookup channel group currently on engine. */ 251 return nvkm_msec(runl->fifo->engine.subdev.device, runl->fifo->timeout.chan_msec, 342 struct nvkm_device *device = fifo->engine.subdev.device; 343 struct nvkm_engine *engine; local 346 engine = nvkm_device_engine(device, type, inst); 347 if (!engine) { 358 engn->engine = engine; [all...] |
H A D | uchan.c | 32 #include <engine/dma.h> 85 /* Unbind engine context from channel, if no longer required. */ 109 /* Bind engine context to channel, if it hasn't been already. */ 163 /* Lookup host engine state for target engine. */ 164 engn = nvkm_runl_find_engn(engn, cgrp->runl, engn->engine == oclass->engine); 176 /* Ref. channel context for target engine.*/ 189 .engine = engn->engine, 211 struct nvkm_engine *engine = engn->engine; local [all...] |
H A D | ga100.c | 47 nvkm_wr32(runl->fifo->engine.subdev.device, runl->chan + (chan->id * 4), 0x00000003); 54 struct nvkm_device *device = runl->fifo->engine.subdev.device; 66 nvkm_wr32(runl->fifo->engine.subdev.device, runl->chan + (chan->id * 4), 0xffffffff); 114 nvkm_wr32(runl->fifo->engine.subdev.device, runl->addr + 0x098, 0x01000000 | cgrp->id); 126 struct nvkm_device *device = runl->fifo->engine.subdev.device; 138 if (nvkm_engine_chsw_load(engn->engine)) 152 struct nvkm_engine *engine = engn->engine; local 154 if (WARN_ON(!engine->func->nonstall)) 157 return engine [all...] |
/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_gpu_error.c | 450 if (ee->engine->class != RENDER_CLASS || GRAPHICS_VER(m->i915) <= 3) 459 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) 464 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) 473 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) 537 err_printf(m, "%s command stream:\n", ee->engine->name); 615 const struct intel_engine_cs *engine, 625 engine ? engine->name : "global", vma->name, 784 * only exists if the corresponding VCS engine is 813 for (ee = gt->engine; e 614 intel_gpu_error_print_vma(struct drm_i915_error_state_buf *m, const struct intel_engine_cs *engine, const struct i915_vma_coredump *vma) argument 1235 const struct intel_engine_cs *engine = ee->engine; local 1543 intel_engine_coredump_alloc(struct intel_engine_cs *engine, gfp_t gfp, u32 dump_flags) argument 1614 const struct intel_engine_cs *engine = ee->engine; local 1639 capture_engine(struct intel_engine_cs *engine, struct i915_vma_compress *compress, u32 dump_flags) argument 1683 struct intel_engine_cs *engine; local [all...] |
/linux-master/drivers/crypto/marvell/cesa/ |
H A D | cipher.c | 87 struct mv_cesa_engine *engine = creq->base.engine; local 91 mv_cesa_adjust_op(engine, &sreq->op); 92 if (engine->pool) 93 memcpy(engine->sram_pool, &sreq->op, sizeof(sreq->op)); 95 memcpy_toio(engine->sram, &sreq->op, sizeof(sreq->op)); 97 len = mv_cesa_sg_copy_to_sram(engine, req->src, creq->src_nents, 106 if (engine->pool) 107 memcpy(engine->sram_pool, &sreq->op, sizeof(sreq->op)); 109 memcpy_toio(engine 128 struct mv_cesa_engine *engine = creq->base.engine; local 185 mv_cesa_skcipher_prepare(struct crypto_async_request *req, struct mv_cesa_engine *engine) argument 212 struct mv_cesa_engine *engine = creq->base.engine; local 460 struct mv_cesa_engine *engine; local [all...] |
/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | selftest_timeline.c | 485 checked_tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value) argument 503 rq = intel_engine_create_kernel_request(engine); 529 struct intel_engine_cs *engine; local 546 for_each_engine(engine, gt, id) { 547 if (!intel_engine_can_store_dword(engine)) 550 intel_engine_pm_get(engine); 562 rq = checked_tl_write(tl, engine, count); 573 intel_engine_pm_put(engine); 603 struct intel_engine_cs *engine; local 622 for_each_engine(engine, g 673 struct intel_engine_cs *engine; local 873 create_watcher(struct hwsp_watcher *w, struct intel_engine_cs *engine, int ringsz) argument 987 struct intel_engine_cs *engine; local 1182 struct intel_engine_cs *engine; local 1260 struct intel_engine_cs *engine; local 1348 struct intel_engine_cs *engine; local [all...] |
/linux-master/drivers/gpu/drm/sun4i/ |
H A D | sun8i_ui_scaler.c | 145 regmap_write(mixer->engine.regs, SUN8I_SCALER_GSU_CTRL(base), val); 169 regmap_write(mixer->engine.regs, 171 regmap_write(mixer->engine.regs, 173 regmap_write(mixer->engine.regs, 175 regmap_write(mixer->engine.regs, 177 regmap_write(mixer->engine.regs, 179 regmap_write(mixer->engine.regs, 184 regmap_write(mixer->engine.regs,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
H A D | gt215.c | 30 #include <engine/fifo.h> 45 struct nvkm_subdev *subdev = &ce->engine.subdev;
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
H A D | gm200.c | 37 nvkm_warn(&gr->base.engine.subdev, "firmware unavailable\n"); 42 * PGRAPH engine/subdev functions 94 return nvkm_rd32(gr->base.engine.subdev.device, 0x12006c); 100 struct nvkm_device *device = gr->base.engine.subdev.device; 108 struct nvkm_device *device = gr->base.engine.subdev.device; 116 struct nvkm_device *device = gr->base.engine.subdev.device; 130 struct nvkm_device *device = gr->base.engine.subdev.device; 226 ret = nvkm_acr_lsfw_load_bl_inst_data_sig(&gr->base.engine.subdev, 233 ret = nvkm_acr_lsfw_load_bl_inst_data_sig(&gr->base.engine.subdev,
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/linux-master/drivers/mtd/nand/ |
H A D | core.c | 213 * nanddev_get_ecc_engine() - Find and get a suitable ECC engine 220 /* Read the user desires in terms of ECC engine/configuration */ 231 nand->ecc.engine = nand_ecc_get_sw_engine(nand); 234 nand->ecc.engine = nand_ecc_get_on_die_hw_engine(nand); 237 nand->ecc.engine = nand_ecc_get_on_host_hw_engine(nand); 238 if (PTR_ERR(nand->ecc.engine) == -EPROBE_DEFER) 242 pr_err("Missing ECC engine type\n"); 245 if (!nand->ecc.engine) 252 * nanddev_put_ecc_engine() - Dettach and put the in-use ECC engine 279 if (!nand->ecc.engine) [all...] |
/linux-master/drivers/gpu/drm/i915/selftests/ |
H A D | igt_spinner.c | 127 struct intel_engine_cs *engine = ce->engine; local 136 if (!intel_engine_can_store_dword(ce->engine)) 198 intel_gt_chipset_flush(engine->gt); 200 if (engine->emit_init_breadcrumb) { 201 err = engine->emit_init_breadcrumb(rq); 209 err = engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags); 256 intel_engine_flush_submission(rq->engine);
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/linux-master/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_guc_submission.h | 23 int intel_guc_submission_setup(struct intel_engine_cs *engine); 28 void intel_guc_dump_active_requests(struct intel_engine_cs *engine,
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/linux-master/drivers/crypto/starfive/ |
H A D | jh7110-cryp.c | 5 * Support for StarFive hardware cryptographic engine. 10 #include <crypto/engine.h> 141 /* Initialize crypto engine */ 142 cryp->engine = crypto_engine_alloc_init(&pdev->dev, 1); 143 if (!cryp->engine) { 148 ret = crypto_engine_start(cryp->engine); 171 crypto_engine_stop(cryp->engine); 173 crypto_engine_exit(cryp->engine); 196 crypto_engine_stop(cryp->engine); 197 crypto_engine_exit(cryp->engine); [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
H A D | gv100.c | 40 struct nvkm_device *device = ior->disp->engine.subdev.device; 56 struct nvkm_device *device = sor->disp->engine.subdev.device; 65 struct nvkm_device *device = sor->disp->engine.subdev.device; 75 struct nvkm_device *device = sor->disp->engine.subdev.device; 102 struct nvkm_device *device = ior->disp->engine.subdev.device; 126 struct nvkm_device *device = ior->disp->engine.subdev.device; 148 struct nvkm_device *device = ior->disp->engine.subdev.device; 186 struct nvkm_device *device = sor->disp->engine.subdev.device; 224 struct nvkm_device *device = disp->engine.subdev.device; 236 struct nvkm_device *device = disp->engine [all...] |
H A D | nv04.c | 32 struct nvkm_device *device = head->disp->engine.subdev.device; 39 struct nvkm_device *device = head->disp->engine.subdev.device; 46 struct nvkm_device *device = head->disp->engine.subdev.device; 55 struct nvkm_device *device = head->disp->engine.subdev.device; 82 struct nvkm_subdev *subdev = &disp->engine.subdev;
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