Searched refs:enable (Results 201 - 225 of 4336) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_df.h37 bool enable);
41 bool enable);
45 bool enable);
H A Dnbio_v7_0.c54 static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable) argument
56 if (enable)
106 bool enable)
108 WREG32_FIELD15(NBIO, 0, RCC_DOORBELL_APER_EN, BIF_DOORBELL_APER_EN, enable ? 1 : 0);
112 bool enable)
149 bool enable)
156 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG))
167 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG))
178 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG))
188 bool enable)
105 nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev, bool enable) argument
111 nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, bool enable) argument
148 nbio_v7_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument
187 nbio_v7_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) argument
[all...]
H A Dnbio_v7_7.c50 static void nbio_v7_7_mc_access_enable(struct amdgpu_device *adev, bool enable) argument
52 if (enable)
109 bool enable)
115 BIF_DOORBELL_APER_EN, enable ? 1 : 0);
121 bool enable)
125 if (enable) {
253 bool enable)
261 if (enable) {
282 bool enable)
290 if (enable)
108 nbio_v7_7_enable_doorbell_aperture(struct amdgpu_device *adev, bool enable) argument
120 nbio_v7_7_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, bool enable) argument
252 nbio_v7_7_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument
281 nbio_v7_7_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) argument
[all...]
H A Dhdp_v5_0.c52 bool enable)
94 if (enable) {
146 bool enable)
155 if (enable) {
177 bool enable)
179 hdp_v5_0_update_mem_power_gating(adev, enable);
180 hdp_v5_0_update_medium_grain_clock_gating(adev, enable);
51 hdp_v5_0_update_mem_power_gating(struct amdgpu_device *adev, bool enable) argument
145 hdp_v5_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument
176 hdp_v5_0_update_clock_gating(struct amdgpu_device *adev, bool enable) argument
H A Dhdp_v5_2.c44 bool enable)
84 if (enable) {
129 bool enable)
138 if (enable) {
185 bool enable)
187 hdp_v5_2_update_mem_power_gating(adev, enable);
188 hdp_v5_2_update_medium_grain_clock_gating(adev, enable);
43 hdp_v5_2_update_mem_power_gating(struct amdgpu_device *adev, bool enable) argument
128 hdp_v5_2_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument
184 hdp_v5_2_update_clock_gating(struct amdgpu_device *adev, bool enable) argument
H A Dnbio_v7_2.c79 static void nbio_v7_2_mc_access_enable(struct amdgpu_device *adev, bool enable) argument
85 if (enable)
93 if (enable)
152 bool enable)
158 BIF_DOORBELL_APER_EN, enable ? 1 : 0);
164 bool enable)
168 if (enable) {
235 bool enable)
240 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG)) {
261 bool enable)
151 nbio_v7_2_enable_doorbell_aperture(struct amdgpu_device *adev, bool enable) argument
163 nbio_v7_2_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, bool enable) argument
234 nbio_v7_2_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument
260 nbio_v7_2_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) argument
[all...]
/linux-master/drivers/irqchip/
H A Dirq-riscv-imsic-state.h25 bool enable; member in struct:imsic_vector
30 /* Local lock to protect vector enable/move variables and dirty bitmap */
78 void imsic_local_delivery(bool enable);
85 return READ_ONCE(vec->enable);
/linux-master/drivers/clk/sunxi-ng/
H A Dccu_nkm.h21 u32 enable; member in struct:ccu_nkm
43 .enable = _gate, \
64 .enable = _gate, \
H A Dccu_mp.h23 u32 enable; member in struct:ccu_mp
40 .enable = _gate, \
61 .enable = _gate, \
91 .enable = _gate, \
121 .enable = _gate, \
155 .enable = BIT(31), \
/linux-master/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-spi.c79 union cvmx_pko_reg_crc_enable enable; local
87 enable.u64 = cvmx_read_csr(CVMX_PKO_REG_CRC_ENABLE);
88 enable.s.enable |= 0xffff << (interface * 16);
89 cvmx_write_csr(CVMX_PKO_REG_CRC_ENABLE, enable.u64);
96 * Bringup and enable a SPI interface. After this call packet I/O
/linux-master/drivers/macintosh/ams/
H A Dams-input.c114 unsigned long enable; local
118 ret = kstrtoul(buf, 0, &enable);
121 if (enable > 1)
126 if (enable != joystick) {
127 if (enable)
/linux-master/arch/arm/mach-sa1100/
H A Dh3600.c75 static void h3600_lcd_power(int enable) argument
80 gpio_direction_output(H3XXX_EGPIO_LCD_ON, enable);
81 gpio_direction_output(H3600_EGPIO_LCD_PCI, enable);
82 gpio_direction_output(H3600_EGPIO_LCD_5V_ON, enable);
83 gpio_direction_output(H3600_EGPIO_LVDD_ON, enable);
/linux-master/drivers/staging/media/atomisp/pci/runtime/debug/src/
H A Dia_css_debug.c393 info->sp.enable.vf_veceven);
394 ia_css_debug_dtrace(2, "enable_dis = %d\n", info->sp.enable.dis);
395 ia_css_debug_dtrace(2, "enable_uds = %d\n", info->sp.enable.uds);
396 ia_css_debug_dtrace(2, "enable ds = %d\n", info->sp.enable.ds);
897 unsigned int enable)
902 if ((enable & IA_CSS_DEBUG_DUMP_FPN)
903 || (enable & IA_CSS_DEBUG_DUMP_ALL)) {
906 if ((enable & IA_CSS_DEBUG_DUMP_OB)
907 || (enable
896 ia_css_debug_dump_isp_params(struct ia_css_stream *stream, unsigned int enable) argument
[all...]
/linux-master/drivers/infiniband/ulp/rtrs/
H A Drtrs-clt-stats.c110 int rtrs_clt_reset_rdma_stats(struct rtrs_clt_stats *stats, bool enable) argument
115 if (!enable)
126 int rtrs_clt_reset_cpu_migr_stats(struct rtrs_clt_stats *stats, bool enable) argument
131 if (!enable)
142 int rtrs_clt_reset_reconnects_stat(struct rtrs_clt_stats *stats, bool enable) argument
144 if (!enable)
152 int rtrs_clt_reset_all_stats(struct rtrs_clt_stats *s, bool enable) argument
154 if (enable) {
155 rtrs_clt_reset_rdma_stats(s, enable);
156 rtrs_clt_reset_cpu_migr_stats(s, enable);
[all...]
/linux-master/sound/soc/sof/intel/
H A Dhda-ctrl.c133 void hda_dsp_ctrl_ppcap_enable(struct snd_sof_dev *sdev, bool enable) argument
135 u32 val = enable ? SOF_HDA_PPCTL_GPROCEN : 0;
142 void hda_dsp_ctrl_ppcap_int_enable(struct snd_sof_dev *sdev, bool enable) argument
144 u32 val = enable ? SOF_HDA_PPCTL_PIE : 0;
151 void hda_dsp_ctrl_misc_clock_gating(struct snd_sof_dev *sdev, bool enable) argument
153 u32 val = enable ? PCI_CGCTL_MISCBDCGE_MASK : 0;
159 * enable/disable audio dsp clock gating and power gating bits.
163 int hda_dsp_ctrl_clock_power_gating(struct snd_sof_dev *sdev, bool enable) argument
168 /* enable/disable audio dsp clock gating */
169 val = enable
[all...]
/linux-master/sound/soc/intel/avs/
H A Dskl.c77 avs_skl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period, argument
92 if (enable)
94 info->logs_core[i].enable = enable;
99 info->logs_core[i].enable = enable;
157 static int avs_skl_set_d0ix(struct avs_dev *adev, bool enable) argument
/linux-master/drivers/gpu/drm/xe/
H A Dxe_gt_sriov_pf_policy.c138 static int pf_provision_sched_if_idle(struct xe_gt *gt, bool enable) argument
145 enable);
167 * @enable: the value of the 'sched_if_idle' policy
173 int xe_gt_sriov_pf_policy_set_sched_if_idle(struct xe_gt *gt, bool enable) argument
178 err = pf_provision_sched_if_idle(gt, enable);
194 bool enable; local
199 enable = gt->sriov.pf.policy.guc.sched_if_idle;
202 return enable;
205 static int pf_provision_reset_engine(struct xe_gt *gt, bool enable) argument
211 &gt->sriov.pf.policy.guc.reset_engine, enable);
239 xe_gt_sriov_pf_policy_set_reset_engine(struct xe_gt *gt, bool enable) argument
260 bool enable; local
[all...]
/linux-master/sound/hda/ext/
H A Dhdac_ext_controller.c23 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
25 * @enable: flag to turn on/off the capability
27 void snd_hdac_ext_bus_ppcap_enable(struct hdac_bus *bus, bool enable) argument
35 if (enable)
45 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
47 * @enable: flag to enable/disable interrupt
49 void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_bus *bus, bool enable) argument
57 if (enable)
167 static int check_hdac_link_power_active(struct hdac_ext_link *hlink, bool enable) argument
378 snd_hdac_ext_bus_link_power(struct hdac_device *codec, bool enable) argument
[all...]
/linux-master/sound/pci/hda/
H A Dhda_beep.c141 * @enable: flag to turn on/off
143 int snd_hda_enable_beep_device(struct hda_codec *codec, int enable) argument
148 enable = !!enable;
149 if (beep->enabled != enable) {
150 beep->enabled = enable;
151 if (enable)
225 /* enable linear scale */
328 int enable = 0; local
331 enable |
[all...]
/linux-master/drivers/net/ethernet/chelsio/cxgb/
H A Dtp.c140 static void set_csum_offload(struct petp *tp, u32 csum_bit, int enable) argument
144 if (enable)
151 void t1_tp_set_ip_checksum_offload(struct petp *tp, int enable) argument
153 set_csum_offload(tp, F_IP_CSUM, enable);
156 void t1_tp_set_tcp_checksum_offload(struct petp *tp, int enable) argument
158 set_csum_offload(tp, F_TCP_CSUM, enable);
/linux-master/drivers/media/platform/ti/davinci/
H A Dvpif.h183 /* bit position of clock and channel enable in vpif_chn_ctrl register */
262 /* inline function to enable/disable channel0 */
263 static inline void enable_channel0(int enable) argument
265 if (enable)
271 /* inline function to enable/disable channel1 */
272 static inline void enable_channel1(int enable) argument
274 if (enable)
280 /* inline function to enable interrupt for channel0 */
281 static inline void channel0_intr_enable(int enable) argument
287 if (enable) {
303 channel1_intr_enable(int enable) argument
418 enable_channel2(int enable) argument
430 enable_channel3(int enable) argument
442 channel2_intr_enable(int enable) argument
463 channel3_intr_enable(int enable) argument
485 channel2_raw_enable(int enable, u8 index) argument
501 channel3_raw_enable(int enable, u8 index) argument
517 channel2_clipping_enable(int enable) argument
529 channel3_clipping_enable(int enable) argument
[all...]
/linux-master/sound/soc/uniphier/
H A Daio-pxs2.c136 [AUD_PLL_A1] = { .enable = true, },
137 [AUD_PLL_F1] = { .enable = true, },
138 [AUD_PLL_A2] = { .enable = true, },
139 [AUD_PLL_F2] = { .enable = true, },
140 [AUD_PLL_APLL] = { .enable = true, },
141 [AUD_PLL_HSC0] = { .enable = true, },
/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dhubp.h119 void (*dcc_control)(struct hubp *hubp, bool enable,
174 void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
193 bool enable);
200 bool enable);
210 bool enable);
217 void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable);
/linux-master/include/acpi/
H A Dcppc_acpi.h145 extern int cppc_set_enable(int cpu, bool enable);
159 extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
161 extern int cppc_set_auto_sel(int cpu, bool enable);
183 static inline int cppc_set_enable(int cpu, bool enable) argument
219 static inline int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable) argument
227 static inline int cppc_set_auto_sel(int cpu, bool enable) argument
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_dim.c97 int mlx5e_dim_rx_change(struct mlx5e_rq *rq, bool enable) argument
99 if (enable == !!rq->dim)
102 if (enable) {
124 int mlx5e_dim_tx_change(struct mlx5e_txqsq *sq, bool enable) argument
126 if (enable == !!sq->dim)
129 if (enable) {

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