Searched refs:dc (Results 101 - 125 of 549) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c76 static void enable_memory_low_power(struct dc *dc)
78 struct dce_hwseq *hws = dc->hwseq;
81 if (dc->debug.enable_mem_low_power.bits.dmcu) {
83 if (dc->debug.disable_dmcu || dc->config.disable_dmcu) {
89 if (dc->debug.enable_mem_low_power.bits.optc) {
94 if (dc->debug.enable_mem_low_power.bits.vga) {
99 if (dc->debug.enable_mem_low_power.bits.mpc &&
100 dc
130 dcn35_init_hw(struct dc *dc) argument
449 dcn35_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx) argument
605 dcn35_power_down_on_boot(struct dc *dc) argument
650 dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable) argument
697 dcn35_z10_restore(const struct dc *dc) argument
707 dcn35_init_pipes(struct dc *dc, struct dc_state *context) argument
896 dcn35_enable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
932 dcn35_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
966 dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx) argument
990 dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context, struct pg_block_update *update_state) argument
1063 dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context, struct pg_block_update *update_state) argument
1178 dcn35_hw_block_power_down(struct dc *dc, struct pg_block_update *update_state) argument
1237 dcn35_hw_block_power_up(struct dc *dc, struct pg_block_update *update_state) argument
1270 dcn35_root_clock_control(struct dc *dc, struct pg_block_update *update_state, bool power_on) argument
1319 dcn35_prepare_bandwidth( struct dc *dc, struct dc_state *context) argument
1338 dcn35_optimize_bandwidth( struct dc *dc, struct dc_state *context) argument
1375 struct dc *dc = pipe_ctx[i]->stream->ctx->dc; local
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/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A DMakefile30 AMD_DAL_BIOS = $(addprefix $(AMDDALPATH)/dc/bios/,$(BIOS))
40 AMD_DISPLAY_FILES += $(AMDDALPATH)/dc/bios/dce60/command_table_helper_dce60.o
48 AMD_DISPLAY_FILES += $(AMDDALPATH)/dc/bios/dce80/command_table_helper_dce80.o
53 AMD_DISPLAY_FILES += $(AMDDALPATH)/dc/bios/dce110/command_table_helper_dce110.o
55 AMD_DISPLAY_FILES += $(AMDDALPATH)/dc/bios/dce112/command_table_helper_dce112.o
57 AMD_DISPLAY_FILES += $(AMDDALPATH)/dc/bios/dce112/command_table_helper2_dce112.o
/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.h30 void dml2_init_ip_params(struct dml2_context *dml2, const struct dc *in_dc, struct ip_params_st *out);
31 void dml2_init_socbb_params(struct dml2_context *dml2, const struct dc *in_dc, struct soc_bounding_box_st *out);
32 void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,
34 void dml2_translate_ip_params(const struct dc *in_dc, struct ip_params_st *out);
35 void dml2_translate_socbb_params(const struct dc *in_dc, struct soc_bounding_box_st *out);
36 void dml2_translate_soc_states(const struct dc *in_dc, struct soc_states_st *out, int num_states);
H A Ddml2_wrapper.h36 struct dc;
72 struct dc *dc; member in struct:dml2_dc_callbacks
75 bool (*can_support_mclk_switch_using_fw_based_vblank_stretch)(struct dc *dc, struct dc_state *context);
76 bool (*acquire_secondary_pipe_for_mpc_odm)(const struct dc *dc, struct dc_state *state, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm);
110 struct dc *dc; member in struct:dml2_dc_svp_callbacks
112 struct dc_stream_state* (*create_phantom_stream)(const struct dc *d
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dsc/
H A DMakefile12 AMD_DISPLAY_FILES += $(addprefix $(AMDDALPATH)/dc/dsc/dcn20/,$(DSC_DCN20))
23 AMD_DISPLAY_FILES += $(addprefix $(AMDDALPATH)/dc/dsc/dcn35/,$(DSC_DCN35))
31 AMD_DAL_DSC = $(addprefix $(AMDDALPATH)/dc/dsc/,$(DSC))
/linux-master/drivers/clk/mvebu/
H A Ddove-divider.c51 static unsigned int dove_get_divider(struct dove_clk *dc) argument
56 val = readl_relaxed(dc->base + DIV_CTRL0);
57 val >>= dc->div_bit_start;
59 divider = val & ~(~0 << dc->div_bit_size);
61 if (dc->divider_table)
62 divider = dc->divider_table[divider];
67 static int dove_calc_divider(const struct dove_clk *dc, unsigned long rate, argument
74 if (dc->divider_table) {
77 for (i = 0; dc->divider_table[i]; i++)
78 if (divider == dc
101 struct dove_clk *dc = to_dove_clk(hw); local
114 struct dove_clk *dc = to_dove_clk(hw); local
133 struct dove_clk *dc = to_dove_clk(hw); local
161 clk_register_dove_divider(struct device *dev, struct dove_clk *dc, const char **parent_names, size_t num_parents, void __iomem *base) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/hdcp/
H A DMakefile26 AMD_DAL_HDCP_MSG = $(addprefix $(AMDDALPATH)/dc/hdcp/,$(HDCP_MSG))
/linux-master/drivers/gpu/drm/amd/display/dc/dcn314/
H A DMakefile15 AMD_DAL_DCN314 = $(addprefix $(AMDDALPATH)/dc/dcn314/,$(DCN314))
/linux-master/drivers/gpu/drm/amd/display/dc/dcn303/
H A DMakefile11 AMD_DAL_DCN3_03 = $(addprefix $(AMDDALPATH)/dc/dcn303/,$(DCN3_03))
/linux-master/drivers/gpu/drm/amd/display/dc/optc/
H A DMakefile33 AMD_DAL_OPTC_DCN10 = $(addprefix $(AMDDALPATH)/dc/optc/dcn10/,$(OPTC_DCN10))
41 AMD_DAL_OPTC_DCN20 = $(addprefix $(AMDDALPATH)/dc/optc/dcn20/,$(OPTC_DCN20))
49 AMD_DAL_OPTC_DCN201 = $(addprefix $(AMDDALPATH)/dc/optc/dcn201/,$(OPTC_DCN201))
61 AMD_DAL_OPTC_DCN30 = $(addprefix $(AMDDALPATH)/dc/optc/dcn30/,$(OPTC_DCN30))
69 AMD_DAL_OPTC_DCN301 = $(addprefix $(AMDDALPATH)/dc/optc/dcn301/,$(OPTC_DCN301))
77 AMD_DAL_OPTC_DCN31 = $(addprefix $(AMDDALPATH)/dc/optc/dcn31/,$(OPTC_DCN31))
85 AMD_DAL_OPTC_DCN314 = $(addprefix $(AMDDALPATH)/dc/optc/dcn314/,$(OPTC_DCN314))
93 AMD_DAL_OPTC_DCN32 = $(addprefix $(AMDDALPATH)/dc/optc/dcn32/,$(OPTC_DCN32))
101 AMD_DAL_OPTC_DCN35 = $(addprefix $(AMDDALPATH)/dc/optc/dcn35/,$(OPTC_DCN35))
/linux-master/drivers/gpu/drm/amd/display/dc/dcn321/
H A DMakefile15 AMD_DAL_DCN321 = $(addprefix $(AMDDALPATH)/dc/dcn321/,$(DCN321))
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn351/
H A DMakefile26 AMD_DAL_DCN351 = $(addprefix $(AMDDALPATH)/dc/dcn351/,$(DCN351))
/linux-master/include/trace/events/
H A Dtegra_apb_dma.h11 TP_PROTO(struct dma_chan *dc, dma_cookie_t cookie, struct dma_tx_state *state),
12 TP_ARGS(dc, cookie, state),
14 __string(chan, dev_name(&dc->dev->device))
28 TP_PROTO(struct dma_chan *dc, int count, void *ptr),
29 TP_ARGS(dc, count, ptr),
31 __string(chan, dev_name(&dc->dev->device))
45 TP_PROTO(struct dma_chan *dc, int irq),
46 TP_ARGS(dc, irq),
48 __string(chan, dev_name(&dc->dev->device))
/linux-master/drivers/gpu/drm/tegra/
H A Ddc.c32 #include "dc.h"
50 static u32 tegra_dc_readl_active(struct tegra_dc *dc, unsigned long offset) argument
54 tegra_dc_writel(dc, READ_MUX, DC_CMD_STATE_ACCESS);
55 value = tegra_dc_readl(dc, offset);
56 tegra_dc_writel(dc, 0, DC_CMD_STATE_ACCESS);
79 dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset);
87 return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset));
93 tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset));
96 bool tegra_dc_has_output(struct tegra_dc *dc, struct device *dev) argument
98 struct device_node *np = dc
121 tegra_dc_commit(struct tegra_dc *dc) argument
317 struct tegra_dc *dc = plane->dc; local
332 struct tegra_dc *dc = plane->dc; local
350 struct tegra_dc *dc = plane->dc; local
629 struct tegra_dc *dc = to_tegra_dc(new_plane_state->crtc); local
803 tegra_primary_plane_create(struct drm_device *drm, struct tegra_dc *dc) argument
907 struct tegra_dc *dc = to_tegra_dc(new_state->crtc); local
1014 struct tegra_dc *dc; local
1069 struct tegra_dc *dc = to_tegra_dc(new_state->crtc); local
1107 tegra_dc_cursor_plane_create(struct drm_device *drm, struct tegra_dc *dc) argument
1252 tegra_dc_overlay_plane_create(struct drm_device *drm, struct tegra_dc *dc, unsigned int index, bool cursor) argument
1311 tegra_dc_add_shared_planes(struct drm_device *drm, struct tegra_dc *dc) argument
1345 tegra_dc_add_planes(struct drm_device *drm, struct tegra_dc *dc) argument
1640 struct tegra_dc *dc = node->info_ent->data; local
1666 struct tegra_dc *dc = node->info_ent->data; local
1697 struct tegra_dc *dc = node->info_ent->data; local
1723 struct tegra_dc *dc = to_tegra_dc(crtc); local
1748 struct tegra_dc *dc = to_tegra_dc(crtc); local
1764 struct tegra_dc *dc = to_tegra_dc(crtc); local
1776 struct tegra_dc *dc = to_tegra_dc(crtc); local
1788 struct tegra_dc *dc = to_tegra_dc(crtc); local
1810 tegra_dc_set_timings(struct tegra_dc *dc, struct drm_display_mode *mode) argument
1854 tegra_dc_state_setup_clock(struct tegra_dc *dc, struct drm_crtc_state *crtc_state, struct clk *clk, unsigned long pclk, unsigned int div) argument
1871 tegra_dc_update_voltage_state(struct tegra_dc *dc, struct tegra_dc_state *state) argument
1917 tegra_dc_set_clock_rate(struct tegra_dc *dc, struct tegra_dc_state *state) argument
1954 tegra_dc_stop(struct tegra_dc *dc) argument
1966 tegra_dc_idle(struct tegra_dc *dc) argument
1975 tegra_dc_wait_idle(struct tegra_dc *dc, unsigned long timeout) argument
2000 struct tegra_dc *dc = to_tegra_dc(crtc); local
2090 struct tegra_dc *dc = to_tegra_dc(crtc); local
2156 struct tegra_dc *dc = to_tegra_dc(crtc); local
2309 struct tegra_dc *dc = to_tegra_dc(crtc); local
2391 struct tegra_dc *dc = to_tegra_dc(crtc); local
2528 struct tegra_dc *dc = data; local
2576 tegra_dc_has_window_groups(struct tegra_dc *dc) argument
2607 struct tegra_dc *dc = host1x_client_to_dc(client); local
2728 struct tegra_dc *dc = host1x_client_to_dc(client); local
2763 struct tegra_dc *dc = host1x_client_to_dc(client); local
2784 struct tegra_dc *dc = host1x_client_to_dc(client); local
3078 tegra_dc_parse_dt(struct tegra_dc *dc) argument
3117 struct tegra_dc *dc = dev_get_drvdata(dev); local
3123 tegra_dc_couple(struct tegra_dc *dc) argument
3148 tegra_dc_init_opp_table(struct tegra_dc *dc) argument
3168 struct tegra_dc *dc; local
3274 struct tegra_dc *dc = platform_get_drvdata(pdev); local
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c28 #include "dc.h"
40 dc->ctx->logger
318 if (pipe->plane_res.dpp->ctx->dc->debug.optimized_watermark) {
333 input->src.dcc = pipe->plane_res.dpp->ctx->dc->res_pool->hubbub->funcs->
453 const struct dc *dc,
458 struct display_mode_lib *dml = (struct display_mode_lib *)(&dc->dml);
497 input->clks_cfg.refclk_mhz = dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000.0;
500 // dc->dml.logger = pool->base.logger;
638 static bool dcn_bw_apply_registry_override(struct dc *d argument
452 dcn_bw_calc_rq_dlg_ttu( const struct dc *dc, const struct dcn_bw_internal_vars *v, struct pipe_ctx *pipe, int in_idx) argument
748 dcn_validate_bandwidth( struct dc *dc, struct dc_state *context, bool fast_validate) argument
1315 dcn_find_normalized_clock_vdd_Level( const struct dc *dc, enum dm_pp_clock_type clocks_type, int clocks_in_khz) argument
1405 dcn_find_dcfclk_suits_all( const struct dc *dc, struct dc_clocks *clocks) argument
1447 dcn_bw_update_from_pplib_fclks( struct dc *dc, struct dm_pp_clock_levels_with_voltage *fclks) argument
1477 dcn_bw_update_from_pplib_dcfclks( struct dc *dc, struct dm_pp_clock_levels_with_voltage *dcfclks) argument
1489 dcn_get_soc_clks( struct dc *dc, int *min_fclk_khz, int *min_dcfclk_khz, int *socclk_khz) argument
1500 dcn_bw_notify_pplib_of_wm_ranges( struct dc *dc, int min_fclk_khz, int min_dcfclk_khz, int socclk_khz) argument
1562 dcn_bw_sync_calcs_and_dml(struct dc *dc) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c61 dc->ctx->logger
68 static void enable_memory_low_power(struct dc *dc) argument
70 struct dce_hwseq *hws = dc->hwseq;
73 if (dc->debug.enable_mem_low_power.bits.dmcu) {
75 if (dc->debug.disable_dmcu || dc->config.disable_dmcu) {
81 if (dc->debug.enable_mem_low_power.bits.optc) {
86 if (dc->debug.enable_mem_low_power.bits.vga) {
91 if (dc
107 dcn31_init_hw(struct dc *dc) argument
412 dcn31_z10_save_init(struct dc *dc) argument
423 dcn31_z10_restore(const struct dc *dc) argument
480 dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) argument
504 dcn31_reset_back_end_for_pipe( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
567 dcn31_reset_hw_ctx_wrap( struct dc *dc, struct dc_state *context) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/resource/
H A DMakefile32 AMD_DAL_RESOURCE_DCE100 = $(addprefix $(AMDDALPATH)/dc/resource/dce100/,$(RESOURCE_DCE100))
40 AMD_DAL_RESOURCE_DCE110 = $(addprefix $(AMDDALPATH)/dc/resource/dce110/,$(RESOURCE_DCE110))
48 AMD_DAL_RESOURCE_DCE112 = $(addprefix $(AMDDALPATH)/dc/resource/dce112/,$(RESOURCE_DCE112))
56 AMD_DAL_RESOURCE_DCE120 = $(addprefix $(AMDDALPATH)/dc/resource/dce120/,$(RESOURCE_DCE120))
64 AMD_DAL_RESOURCE_DCE80 = $(addprefix $(AMDDALPATH)/dc/resource/dce80/,$(RESOURCE_DCE80))
75 AMD_DAL_RESOURCE_DCN10 = $(addprefix $(AMDDALPATH)/dc/resource/dcn10/,$(RESOURCE_DCN10))
83 AMD_DAL_RESOURCE_DCN20 = $(addprefix $(AMDDALPATH)/dc/resource/dcn20/,$(RESOURCE_DCN20))
91 AMD_DAL_RESOURCE_DCN201 = $(addprefix $(AMDDALPATH)/dc/resource/dcn201/,$(RESOURCE_DCN201))
99 AMD_DAL_RESOURCE_DCN21 = $(addprefix $(AMDDALPATH)/dc/resource/dcn21/,$(RESOURCE_DCN21))
107 AMD_DAL_RESOURCE_DCN30 = $(addprefix $(AMDDALPATH)/dc/resourc
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
H A Ddce110_clk_mgr.h39 struct dc *dc,
/linux-master/drivers/gpu/drm/amd/display/modules/inc/
H A Dmod_vmid.h31 #include "dc.h"
40 struct dc *dc,
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.h43 struct dc *dc);
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.h21 struct dc *dc);
/linux-master/drivers/gpu/drm/amd/display/dc/dce60/
H A DMakefile26 CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = -Wno-override-init
31 AMD_DAL_DCE60 = $(addprefix $(AMDDALPATH)/dc/dce60/,$(DCE60))
/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Dresource.h91 struct dc *dc,
95 struct resource_pool *dc_create_resource_pool(struct dc *dc,
99 void dc_destroy_resource_pool(struct dc *dc);
102 const struct dc *dc,
113 const struct dc *dc,
[all...]
/linux-master/drivers/scsi/esas2r/
H A Desas2r_disc.c291 struct esas2r_disc_context *dc = &a->disc_ctx; local
298 dc->disc_evt |= disc_evt;
314 struct esas2r_disc_context *dc = &a->disc_ctx; local
326 if (dc->disc_evt) {
352 esas2r_trace("disc_evt: %d", dc->disc_evt);
354 dc->flags = 0;
357 dc->flags |= DCF_POLLED;
359 rq->interrupt_cx = dc;
363 if (dc->disc_evt & DCDE_DEV_SCAN) {
364 dc
389 struct esas2r_disc_context *dc = local
505 struct esas2r_disc_context *dc = local
520 struct esas2r_disc_context *dc = local
551 struct esas2r_disc_context *dc = local
580 struct esas2r_disc_context *dc = local
627 struct esas2r_disc_context *dc = local
690 struct esas2r_disc_context *dc = local
742 struct esas2r_disc_context *dc = local
791 struct esas2r_disc_context *dc = local
828 struct esas2r_disc_context *dc = local
884 struct esas2r_disc_context *dc = local
942 struct esas2r_disc_context *dc = local
1047 struct esas2r_disc_context *dc = local
1086 struct esas2r_disc_context *dc = local
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc.h381 struct dc;
387 bool (*get_dcc_compression_cap)(const struct dc *dc,
390 bool (*get_subvp_en)(struct dc *dc, struct dc_state *context);
403 /* Structure to hold configuration flags set by dm at dc creation. */
609 unsigned long long start_tick = dc->debug.bw_val_profile.enable ? \
610 dm_get_timestamp(dc->ctx) : 0
613 if (dc->debug.bw_val_profile.enable) \
614 dc
1325 struct dc { struct
1638 const struct dc *dc; member in struct:dc_link
[all...]

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