Searched refs:bpp (Results 26 - 46 of 46) sorted by relevance

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/haiku/headers/private/graphics/s3/
H A DDriverInterface.h125 uint32 bpp; // bits/pixel member in struct:DisplayModeEx
/haiku/src/add-ons/accelerants/radeon/
H A Dcrtc.c122 values->crtc_pitch = Radeon_RoundVWidth( mode->virtual_width, vc->bpp ) / 8;
137 (vc->mode.h_display_start + crtc->rel_x) * vc->bpp +
/haiku/src/add-ons/accelerants/skeleton/engine/
H A Dproto.h69 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp);
89 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp);
H A Dcrtc.c600 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp) argument
605 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
H A Dcrtc2.c583 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument
587 LOG(4,("CRTC2: setting card RAM to be displayed bpp %d\n", bpp));
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_crtc2.c294 status_t g400_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument
296 LOG(4,("CRTC2: setting card RAM to be displayed for %d bits per pixel\n", bpp));
H A Dmga_crtc.c364 status_t gx00_crtc_set_display_start(uint32 startadd,uint8 bpp) argument
368 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
/haiku/src/add-ons/accelerants/via/engine/
H A Dproto.h69 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp);
89 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp);
H A Dcrtc.c591 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp) argument
593 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
H A Dcrtc2.c583 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument
587 LOG(4,("CRTC2: setting card RAM to be displayed bpp %d\n", bpp));
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_proto.h81 status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp);
101 status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp);
H A Dnv_acc_dma.c1735 uint8 bpp; local
1743 bpp = 2;
1747 bpp = 2;
1752 bpp = 4;
1759 bpp = 2;
1763 bpp = 2;
1854 (list[i].src_top * si->fbc.bytes_per_row) + (list[i].src_left * bpp); /* Offset */
1897 uint8 bpp; local
1908 bpp = 2;
1912 bpp
[all...]
H A Dnv_crtc.c757 status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp) argument
762 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
H A Dnv_crtc2.c738 status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument
742 LOG(4,("CRTC2: setting card RAM to be displayed bpp %d\n", bpp));
/haiku/src/system/libnetwork/netresolv/net/
H A Dgethnamaddr.c866 map_v4v6_hostent(struct hostent *hp, char **bpp, char *ep) argument
871 _DIAGASSERT(bpp != NULL);
880 (size_t)((u_long)*bpp % sizeof(align)));
882 if (ep - *bpp < (i + NS_IN6ADDRSZ)) {
887 *bpp += i;
888 map_v4v6_address(*ap, *bpp);
889 *ap = *bpp;
890 *bpp += NS_IN6ADDRSZ;
/haiku/src/add-ons/accelerants/3dfx/
H A Daccelerant.h147 bool TDFX_GetColorSpaceParams(int colorSpace, uint8& bpp);
/haiku/src/add-ons/accelerants/ati/
H A Daccelerant.h71 bool (*GetColorSpaceParams)(int colorSpace, uint8& bpp,
/haiku/src/add-ons/accelerants/s3/
H A Daccel.h66 bool (*GetColorSpaceParams)(int colorSpace, uint32& bpp, uint32& maxPixelClk);
/haiku/headers/private/graphics/radeon/
H A Dradeon_interface.h398 uint bpp; // bytes per pixel member in struct:__anon25
/haiku/src/add-ons/accelerants/neomagic/engine/
H A Dnm_crtc.c542 status_t nm_crtc_set_display_start(uint32 startadd,uint8 bpp) argument
593 switch(bpp)
/haiku/3rdparty/mmu_man/onlinedemo/
H A Dhaiku.php32 // to use the tightvnc applet instead (supports > 8bpp):

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