/haiku/headers/private/graphics/s3/ |
H A D | DriverInterface.h | 125 uint32 bpp; // bits/pixel member in struct:DisplayModeEx
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/haiku/src/add-ons/accelerants/radeon/ |
H A D | crtc.c | 122 values->crtc_pitch = Radeon_RoundVWidth( mode->virtual_width, vc->bpp ) / 8; 137 (vc->mode.h_display_start + crtc->rel_x) * vc->bpp +
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/haiku/src/add-ons/accelerants/skeleton/engine/ |
H A D | proto.h | 69 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp); 89 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp);
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H A D | crtc.c | 600 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp) argument 605 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
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H A D | crtc2.c | 583 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument 587 LOG(4,("CRTC2: setting card RAM to be displayed bpp %d\n", bpp));
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/haiku/src/add-ons/accelerants/matrox/engine/ |
H A D | mga_crtc2.c | 294 status_t g400_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument 296 LOG(4,("CRTC2: setting card RAM to be displayed for %d bits per pixel\n", bpp));
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H A D | mga_crtc.c | 364 status_t gx00_crtc_set_display_start(uint32 startadd,uint8 bpp) argument 368 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
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/haiku/src/add-ons/accelerants/via/engine/ |
H A D | proto.h | 69 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp); 89 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp);
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H A D | crtc.c | 591 status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp) argument 593 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
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H A D | crtc2.c | 583 status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument 587 LOG(4,("CRTC2: setting card RAM to be displayed bpp %d\n", bpp));
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/haiku/src/add-ons/accelerants/nvidia/engine/ |
H A D | nv_proto.h | 81 status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp); 101 status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp);
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H A D | nv_acc_dma.c | 1735 uint8 bpp; local 1743 bpp = 2; 1747 bpp = 2; 1752 bpp = 4; 1759 bpp = 2; 1763 bpp = 2; 1854 (list[i].src_top * si->fbc.bytes_per_row) + (list[i].src_left * bpp); /* Offset */ 1897 uint8 bpp; local 1908 bpp = 2; 1912 bpp [all...] |
H A D | nv_crtc.c | 757 status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp) argument 762 LOG(4,("CRTC: setting card RAM to be displayed bpp %d\n", bpp));
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H A D | nv_crtc2.c | 738 status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp) argument 742 LOG(4,("CRTC2: setting card RAM to be displayed bpp %d\n", bpp));
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/haiku/src/system/libnetwork/netresolv/net/ |
H A D | gethnamaddr.c | 866 map_v4v6_hostent(struct hostent *hp, char **bpp, char *ep) argument 871 _DIAGASSERT(bpp != NULL); 880 (size_t)((u_long)*bpp % sizeof(align))); 882 if (ep - *bpp < (i + NS_IN6ADDRSZ)) { 887 *bpp += i; 888 map_v4v6_address(*ap, *bpp); 889 *ap = *bpp; 890 *bpp += NS_IN6ADDRSZ;
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/haiku/src/add-ons/accelerants/3dfx/ |
H A D | accelerant.h | 147 bool TDFX_GetColorSpaceParams(int colorSpace, uint8& bpp);
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/haiku/src/add-ons/accelerants/ati/ |
H A D | accelerant.h | 71 bool (*GetColorSpaceParams)(int colorSpace, uint8& bpp,
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/haiku/src/add-ons/accelerants/s3/ |
H A D | accel.h | 66 bool (*GetColorSpaceParams)(int colorSpace, uint32& bpp, uint32& maxPixelClk);
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/haiku/headers/private/graphics/radeon/ |
H A D | radeon_interface.h | 398 uint bpp; // bytes per pixel member in struct:__anon25
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/haiku/src/add-ons/accelerants/neomagic/engine/ |
H A D | nm_crtc.c | 542 status_t nm_crtc_set_display_start(uint32 startadd,uint8 bpp) argument 593 switch(bpp)
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/haiku/3rdparty/mmu_man/onlinedemo/ |
H A D | haiku.php | 32 // to use the tightvnc applet instead (supports > 8bpp):
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