1/* general card functions */ 2status_t nv_general_powerup(void); 3status_t nv_set_cas_latency(void); 4void setup_virtualized_heads(bool); 5void set_crtc_owner(bool); 6status_t nv_general_output_select(bool); 7status_t nv_general_head_select(bool); 8status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode); 9 10/* AGP functions */ 11status_t nv_agp_setup(bool enable_agp); 12 13/* apsed: logging macros */ 14#define MSG(args) do { /* if needed or si->settings with si NULL */ \ 15 nv_log args; \ 16} while (0) 17#define LOG(level_bit, args) do { \ 18 uint32 mod = (si->settings.logmask & 0xfffffff0) & MODULE_BIT; \ 19 uint32 lev = (si->settings.logmask & ~0xfffffff0) & level_bit; \ 20 if (mod && lev) nv_log args; \ 21} while (0) 22 23/* support functions */ 24void delay(bigtime_t i); 25void nv_log(char *format, ...); 26 27/* i2c functions */ 28status_t i2c_sec_tv_adapter(void); 29char i2c_flag_error (char ErrNo); 30void i2c_bstart (uint8 BusNR); 31void i2c_bstop (uint8 BusNR); 32uint8 i2c_readbyte(uint8 BusNR, bool Ack); 33bool i2c_writebyte (uint8 BusNR, uint8 byte); 34void i2c_readbuffer (uint8 BusNR, uint8* buf, uint8 size); 35void i2c_writebuffer (uint8 BusNR, uint8* buf, uint8 size); 36status_t i2c_init(void); 37void i2c_TestEDID(void); 38void i2c_DetectScreens(void); 39 40/* card info functions */ 41status_t parse_pins(void); 42void set_pll(uint32 reg, uint32 clk); 43void get_panel_modes(display_mode *p1, display_mode *p2, bool *pan1, bool *pan2); 44void fake_panel_start(void); 45status_t get_crtc1_screen_native_mode(display_mode *mode); 46status_t get_crtc2_screen_native_mode(display_mode *mode); 47void set_specs(void); 48void dump_pins(void); 49 50/* DAC functions */ 51bool nv_dac_crt_connected(void); 52status_t nv_dac_mode(int,float); 53status_t nv_dac_dither(bool dither); 54status_t nv_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256]); 55status_t nv_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); 56status_t nv_dac_set_pix_pll(display_mode target); 57status_t nv_dac_sys_pll_find(float, float*, uint8*, uint8*, uint8*, uint8); 58 59/* DAC2 functions */ 60bool nv_dac2_crt_connected(void); 61status_t nv_dac2_mode(int,float); 62status_t nv_dac2_palette(uint8 r[256],uint8 g[256],uint8 b[256]); 63status_t nv_dac2_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); 64status_t nv_dac2_set_pix_pll(display_mode target); 65 66/* Brooktree TV functions */ 67bool BT_probe(void); 68uint8 BT_dpms(bool display); 69uint8 BT_check_tvmode(display_mode target); 70status_t BT_stop_tvout(void); 71status_t BT_setmode(display_mode target); 72 73/* CRTC1 functions */ 74status_t nv_crtc_interrupt_enable(bool); 75status_t nv_crtc_update_fifo(void); 76status_t nv_crtc_validate_timing( 77 uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht, 78 uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt); 79status_t nv_crtc_set_timing(display_mode target); 80status_t nv_crtc_depth(int mode); 81status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp); 82status_t nv_crtc_set_display_pitch(void); 83status_t nv_crtc_dpms(bool, bool, bool, bool); 84status_t nv_crtc_mem_priority(uint8); 85status_t nv_crtc_cursor_init(void); 86status_t nv_crtc_cursor_define(uint8*,uint8*); 87status_t nv_crtc_cursor_position(uint16 x ,uint16 y); 88status_t nv_crtc_cursor_show(void); 89status_t nv_crtc_cursor_hide(void); 90status_t nv_crtc_stop_tvout(void); 91status_t nv_crtc_start_tvout(void); 92 93/* CRTC2 functions */ 94status_t nv_crtc2_interrupt_enable(bool); 95status_t nv_crtc2_update_fifo(void); 96status_t nv_crtc2_validate_timing( 97 uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht, 98 uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt); 99status_t nv_crtc2_set_timing(display_mode target); 100status_t nv_crtc2_depth(int mode); 101status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp); 102status_t nv_crtc2_set_display_pitch(void); 103status_t nv_crtc2_dpms(bool, bool, bool, bool); 104status_t nv_crtc2_mem_priority(uint8); 105status_t nv_crtc2_cursor_init(void); 106status_t nv_crtc2_cursor_define(uint8*,uint8*); 107status_t nv_crtc2_cursor_position(uint16 x ,uint16 y); 108status_t nv_crtc2_cursor_show(void); 109status_t nv_crtc2_cursor_hide(void); 110status_t nv_crtc2_stop_tvout(void); 111status_t nv_crtc2_start_tvout(void); 112 113/* acceleration functions */ 114//offscreen_buffer_config, cliprect and clipped_scaled_blit_params are here temporary.. 115typedef struct { 116 void* buffer; /* pointer to first byte of frame */ 117 /* buffer in virtual memory */ 118 119 void* buffer_dma; /* pointer to first byte of frame */ 120 /* buffer in physical memory for DMA */ 121 122 uint32 bytes_per_row; /* number of bytes in one */ 123 /* virtual_width line */ 124 /* not neccesarily the same as */ 125 /* virtual_width * byte_per_pixel */ 126 127 uint32 space; /* pixel configuration */ 128} offscreen_buffer_config; 129 130typedef struct { 131 uint16 left; /* offset */ 132 uint16 top; 133 uint16 width; /* 0 to N, where zero means one */ 134 /* pixel, one means two pixels, */ 135 /* etc. */ 136 uint16 height; /* 0 to M, where zero means one */ 137 /* line, one means two lines, etc. */ 138} cliprect; 139 140typedef struct { 141 uint16 src_left; /* offset within source rectangle */ 142 uint16 src_top; 143 uint16 src_width; /* 0 to N, where zero means one */ 144 /* pixel, one means two pixels, */ 145 /* etc. */ 146 uint16 src_height; /* 0 to M, where zero means one */ 147 /* line, one means two lines, etc. */ 148 uint16 dest_left; /* output reference, only the cliplist is displayed */ 149 uint16 dest_top; 150 uint16 dest_width; /* 0 to N, where zero means one */ 151 /* pixel, one means two pixels, etc. */ 152 uint16 dest_height; /* 0 to M, where zero means one */ 153 /* line, one means two lines, etc. */ 154 155 cliprect* dest_cliplist; /* rectangle(s) to draw in destination */ 156 /* guaranteed constrained to */ 157 /* virtual width and height */ 158 uint16 dest_clipcount; /* number of rectangles to draw */ 159} clipped_scaled_blit_params; 160 161status_t check_acc_capability(uint32 feature); 162status_t nv_acc_init(void); 163void nv_acc_assert_fifo(void); 164status_t nv_acc_setup_blit(void); 165status_t nv_acc_blit(uint16,uint16,uint16, uint16,uint16,uint16 ); 166status_t nv_acc_setup_rectangle(uint32 color); 167status_t nv_acc_rectangle(uint32 xs,uint32 xe,uint32 ys,uint32 yl); 168status_t nv_acc_setup_rect_invert(void); 169status_t nv_acc_rectangle_invert(uint32 xs,uint32 xe,uint32 ys,uint32 yl); 170status_t nv_acc_transparent_blit(uint16,uint16,uint16, uint16,uint16,uint16, uint32); 171status_t nv_acc_video_blit(uint16 xs,uint16 ys,uint16 ws, uint16 hs, 172 uint16 xd,uint16 yd,uint16 wd,uint16 hd); 173status_t nv_acc_wait_idle(void); 174/* DMA versions */ 175status_t nv_acc_wait_idle_dma(void); 176status_t nv_acc_init_dma(void); 177void nv_acc_assert_fifo_dma(void); 178void SCREEN_TO_SCREEN_BLIT_DMA(engine_token *et, blit_params *list, uint32 count); 179void SCREEN_TO_SCREEN_TRANSPARENT_BLIT_DMA(engine_token *et, uint32 transparent_colour, blit_params *list, uint32 count); 180void SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA(engine_token *et, scaled_blit_params *list, uint32 count); 181void OFFSCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA( 182 engine_token *et, offscreen_buffer_config *config, clipped_scaled_blit_params *list, uint32 count); 183void FILL_RECTANGLE_DMA(engine_token *et, uint32 color, fill_rect_params *list, uint32 count); 184void INVERT_RECTANGLE_DMA(engine_token *et, fill_rect_params *list, uint32 count); 185void FILL_SPAN_DMA(engine_token *et, uint32 color, uint16 *list, uint32 count); 186 187/* backend scaler functions */ 188status_t check_overlay_capability(uint32 feature); 189void nv_bes_move_overlay(void); 190status_t nv_bes_to_crtc(bool crtc); 191status_t nv_bes_init(void); 192status_t nv_configure_bes 193 (const overlay_buffer *ob, const overlay_window *ow,const overlay_view *ov, int offset); 194status_t nv_release_bes(void); 195 196/* driver structures and enums */ 197enum{BPP8 = 0, BPP15 = 1, BPP16 = 2, BPP24 = 3, BPP32 = 4}; 198