/fuchsia/zircon/third_party/ulib/ngunwind/src/ |
H A D | fuchsia.c | 259 remote_access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_t *val, argument 262 Debug (3, "called, regno %d\n", (int) reg); 267 Debug (3, "writing to reg\n"); 270 if (!unw_is_greg (reg)) 272 Debug (3, "bad regnum: %d\n", (int) reg); 287 *val = get_uint32 (buf + fuchsia_greg_offset[reg]); 289 *val = get_uint64 (buf + fuchsia_greg_offset[reg]); 290 Debug (3, "reg val: 0x%llx\n", (long long) *val); 295 remote_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, argument
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/fuchsia/zircon/system/dev/i2c/aml-i2c/ |
H A D | aml-i2c.c | 18 #include <hw/reg.h> 73 uint32_t reg = dev->virt_regs->slave_addr; local 74 reg = reg & ~0xff; 75 reg = reg | ((addr << 1) & 0xff); 76 dev->virt_regs->slave_addr = reg; 92 uint32_t reg = dev->virt_regs->control; local 93 if (reg & AML_I2C_CONTROL_REG_ERR) { 105 printf("control reg [all...] |
/fuchsia/zircon/kernel/dev/interrupt/arm_gic/v3/include/dev/interrupt/ |
H A D | arm_gicv3_regs.h | 9 #include <reg.h> 14 #define GICREG(gic, reg) (*REG32(arm_gicv3_gic_base + (reg))) 15 #define GICREG64(gic, reg) (*REG64(arm_gicv3_gic_base + (reg)))
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/fuchsia/zircon/kernel/dev/iommu/intel/ |
H A D | iommu_impl.h | 53 reg::Capability* caps() { return &caps_; } 54 reg::ExtendedCapability* extended_caps() { return &extended_caps_; } 115 zx_status_t WaitForValueLocked(RegType* reg, 153 reg::Capability caps_; 154 reg::ExtendedCapability extended_caps_;
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/fuchsia/zircon/kernel/dev/uart/pl011/ |
H A D | uart.c | 8 #include <reg.h> 38 #define UARTREG(base, reg) (*REG32((base) + (reg)))
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/fuchsia/zircon/kernel/dev/uart/mt8167/ |
H A D | uart.cpp | 15 #include <reg.h> 103 #define UARTREG(reg) (*(volatile uint32_t*)((uart_base) + (reg)))
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/fuchsia/zircon/kernel/dev/uart/nxp-imx/ |
H A D | uart.c | 6 #include <reg.h> 77 #define UARTREG(reg) (*(volatile uint32_t*)((uart_base) + (reg)))
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/fuchsia/zircon/system/dev/pci/designware/ |
H A D | dw-pcie.cpp | 115 volatile uint8_t* reg = elbi + GEN2_CTRL_OFF; 117 uint32_t val = readl(reg); 119 writel(val, reg);
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H A D | dw-pcie-hw.h | 9 #include <hw/reg.h>
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/fuchsia/zircon/kernel/dev/interrupt/arm_gic/v2/ |
H A D | arm_gicv2.cpp | 27 #include <reg.h> 76 int reg = vector / 32; local 80 GICREG(0, GICD_ISENABLER(reg)) = mask; 82 GICREG(0, GICD_ICENABLER(reg)) = mask; 355 uint32_t reg = GICREG(0, GICD_ITARGETSR(vector / 4)); 356 if (reg & mask) {
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/fuchsia/zircon/kernel/arch/x86/include/arch/x86/ |
H A D | descriptor.h | 46 #include <reg.h>
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H A D | registers.h | 194 uint64_t x86_xgetbv(uint32_t reg); 195 void x86_xsetbv(uint32_t reg, uint64_t val);
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/fuchsia/zircon/system/dev/board/vim/ |
H A D | vim-mali.c | 7 #include <hw/reg.h>
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/fuchsia/zircon/system/dev/display/astro-display/ |
H A D | dw-mipi-dsi.h | 13 #include "dw-mipi-dsi-reg.h" 38 zx_status_t WaitforFifo(uint32_t reg, uint32_t bit, uint32_t val);
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/fuchsia/zircon/system/dev/lib/amlogic/ |
H A D | s905d2-mali.c | 9 #include <hw/reg.h>
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/fuchsia/zircon/system/dev/lib/hi3660/ |
H A D | hi3660-i2c.c | 8 #include <hw/reg.h>
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H A D | hi3660-dsi.c | 9 #include <hw/reg.h>
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H A D | hi3660-usb.c | 8 #include <hw/reg.h>
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/fuchsia/zircon/system/dev/scpi/aml-scpi-s912/ |
H A D | aml-mailbox.h | 15 #include <hw/reg.h>
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/fuchsia/zircon/system/dev/ethernet/dwmac/ |
H A D | dwmac.cpp | 20 #include <hw/reg.h> 231 auto mdio_write_thunk = [](void* arg, uint32_t reg, uint32_t val) -> zx_status_t { 232 return reinterpret_cast<DWMacDevice*>(arg)->MDIOWrite(reg, val); 235 auto mdio_read_thunk = [](void* arg, uint32_t reg, uint32_t* val) -> zx_status_t { 236 return reinterpret_cast<DWMacDevice*>(arg)->MDIORead(reg, val); 353 zx_status_t DWMacDevice::MDIOWrite(uint32_t reg, uint32_t val) { argument 357 (reg << MIIREGSHIFT) | 372 zx_status_t DWMacDevice::MDIORead(uint32_t reg, uint32_t* val) { argument 374 (reg << MIIREGSHIFT);
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/fuchsia/zircon/system/dev/i2c/dw-i2c/ |
H A D | dw-i2c.c | 13 #include <hw/reg.h> 153 uint32_t reg = I2C_DW_READ32(DW_I2C_RAW_INTR_STAT); local 154 if (reg & DW_I2C_INTR_TX_ABRT) { 235 uint32_t reg = I2C_DW_READ32(DW_I2C_TAR); local 236 reg = I2C_DW_SET_MASK(reg, DW_I2C_TAR_TAR_START, DW_I2C_TAR_TAR_BITS, addr); 237 reg = I2C_DW_SET_MASK(reg, DW_I2C_TAR_10BIT_START, DW_I2C_TAR_10BIT_BITS, 0); 238 I2C_DW_WRITE32(DW_I2C_TAR, reg);
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/fuchsia/zircon/kernel/arch/x86/ |
H A D | debugger.cpp | 28 #define SYSCALL_OFFSETS_EQUAL(reg) \ 29 (__offsetof(zx_thread_state_general_regs_t, reg) == \ 30 __offsetof(x86_syscall_general_regs_t, reg)) 65 #define COPY_REG(out, in, reg) (out)->reg = (in)->reg
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/fuchsia/zircon/kernel/arch/arm64/include/arch/arm64/ |
H A D | mp.h | 12 #include <reg.h>
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/fuchsia/zircon/system/dev/display/aml-canvas/ |
H A D | aml-canvas.h | 13 #include <hw/reg.h>
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/fuchsia/zircon/system/dev/i2c/imx-i2c/ |
H A D | imx-i2c.h | 15 #include <hw/reg.h>
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