1// Copyright 2018 The Fuchsia Authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#pragma once
6
7#include <ddk/mmio-buffer.h>
8#include <ddk/device.h>
9#include <ddk/protocol/amlogic-canvas.h>
10#include <ddk/protocol/platform-bus.h>
11#include <ddk/protocol/platform-defs.h>
12#include <ddk/protocol/platform-device.h>
13#include <hw/reg.h>
14#include <threads.h>
15
16#define NUM_CANVAS_ENTRIES 256
17#define CANVAS_BYTE_STRIDE 32
18
19#define IS_ALIGNED(a, b) (!(((uintptr_t)(a)) & (((uintptr_t)(b))-1)))
20
21#define CANVAS_ERROR(fmt, ...) zxlogf(ERROR, "[%s %d]" fmt, __func__, __LINE__, ##__VA_ARGS__)
22#define CANVAS_INFO(fmt, ...) zxlogf(INFO, "[%s %d]" fmt, __func__, __LINE__, ##__VA_ARGS__)
23
24#define READ32_DMC_REG(a)                readl(canvas->dmc_regs.vaddr + a)
25#define WRITE32_DMC_REG(a, v)            writel(v, canvas->dmc_regs.vaddr + a)
26
27#define DMC_CAV_LUT_DATAL                   (0x12 << 2)
28#define DMC_CAV_LUT_DATAH                   (0x13 << 2)
29#define DMC_CAV_LUT_ADDR                    (0x14 << 2)
30
31#define DMC_CAV_ADDR_LMASK                  0x1fffffff
32#define DMC_CAV_WIDTH_LMASK                 0x7
33#define DMC_CAV_WIDTH_LWID                  3
34#define DMC_CAV_WIDTH_LBIT                  29
35
36#define DMC_CAV_WIDTH_HMASK                 0x1ff
37#define DMC_CAV_WIDTH_HBIT                  0
38#define DMC_CAV_HEIGHT_MASK                 0x1fff
39#define DMC_CAV_HEIGHT_BIT                  9
40
41#define DMC_CAV_BLKMODE_MASK                3
42#define DMC_CAV_BLKMODE_BIT                 24
43
44#define DMC_CAV_ENDIANNESS_BIT              26
45#define DMC_CAV_ENDIANNESS_MASK             0xf
46
47#define DMC_CAV_LUT_ADDR_INDEX_MASK         0x7
48#define DMC_CAV_LUT_ADDR_RD_EN              (1 << 8)
49#define DMC_CAV_LUT_ADDR_WR_EN              (2 << 8)
50
51#define DMC_CAV_YWRAP                       (1<<23)
52#define DMC_CAV_XWRAP                       (1<<22)
53
54// Proxy request IDs.
55enum {
56    CANVAS_CONFIG,
57    CANVAS_FREE,
58};
59
60// Proxy request.
61typedef struct {
62    platform_proxy_req_t header;
63    canvas_info_t info;
64    size_t offset;
65    uint8_t idx;
66} rpc_canvas_req_t;
67
68// Proxy response.
69typedef struct {
70    platform_proxy_rsp_t header;
71    uint8_t idx;
72} rpc_canvas_rsp_t;
73
74// Context for driver implementation.
75typedef struct {
76    zx_device_t* zxdev;
77    platform_device_protocol_t pdev;
78    mmio_buffer_t dmc_regs;
79    mtx_t lock;
80    canvas_protocol_t canvas;
81    zx_handle_t bti;
82    zx_handle_t pmt_handle[NUM_CANVAS_ENTRIES];
83} aml_canvas_t;
84
85// Context for driver proxy.
86typedef struct {
87    zx_device_t* zxdev;
88    platform_proxy_protocol_t proxy;
89    canvas_protocol_t canvas;
90} aml_canvas_proxy_t;
91