Searched refs:BIT (Results 76 - 100 of 579) sorted by relevance

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/freebsd-current/sys/contrib/dev/rtw88/
H A Drtw8822c.h179 #define BIT_LDOE25_PON BIT(0)
207 #define BIT_PT_OPT BIT(21)
210 #define BIT_PATH_EN BIT(31)
212 #define BIT_DIS_SHARERX_TXGAT BIT(27)
213 #define BIT_3WIRE_TX_EN BIT(0)
214 #define BIT_3WIRE_RX_EN BIT(1)
216 #define BIT_3WIRE_PI_ON BIT(28)
218 #define BIT_ANAPAR_UPDATE BIT(29)
220 #define BIT_RFTXEN_GCK_FORCE_ON BIT(31)
222 #define BIT_TX_SCALE_0DB BIT(
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H A Drtw8821c.h10 #define RCR_VHT_ACK BIT(26)
123 #define BIT_FEN_PCIEA BIT(6)
185 le32_get_bits(*((__le32 *)(phy_stat) + 0x03), BIT(23))
186 #define BIT_LNA_H_MASK BIT(3)
214 #define BIT_FEN_EN BIT(26)
218 #define BIT_RX_PSEL_RST (BIT(28) | BIT(29))
264 #define B_BTG_SWITCH BIT(16)
265 #define B_CTRL_SWITCH BIT(18)
266 #define B_WL_SWITCH (BIT(2
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H A Dtx.h27 #define RTW_TX_DESC_W0_BMC BIT(24)
28 #define RTW_TX_DESC_W0_LS BIT(26)
29 #define RTW_TX_DESC_W0_DISQSELSEQ BIT(31)
34 #define RTW_TX_DESC_W1_MORE_DATA BIT(29)
35 #define RTW_TX_DESC_W2_AGG_EN BIT(12)
36 #define RTW_TX_DESC_W2_SPE_RPT BIT(19)
38 #define RTW_TX_DESC_W2_BT_NULL BIT(23)
40 #define RTW_TX_DESC_W3_USE_RATE BIT(8)
41 #define RTW_TX_DESC_W3_DISDATAFB BIT(10)
42 #define RTW_TX_DESC_W3_USE_RTS BIT(1
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H A Dbf.h16 #define BIT_DIS_CHK_VHTSIGB_CRC BIT(6)
17 #define BIT_DIS_CHK_VHTSIGA_CRC BIT(5)
18 #define BIT_MASK_BEAMFORM (GENMASK(4, 0) | BIT(7))
26 #define BIT_WMAC_USE_NDPARATE BIT(30)
27 #define BIT_WMAC_TXMU_ACKPOLICY_EN BIT(6)
28 #define BIT_USE_NDPA_PARAMETER BIT(30)
29 #define BIT_MU_P1_WAIT_STATE_EN BIT(16)
30 #define BIT_EN_MU_MIMO BIT(7)
42 #define BIT_RXFLTMAP0_ACTIONNOACK BIT(14)
43 #define BIT_RXFLTMAP1_BF (BIT(
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H A Drx.h18 le32_get_bits(*((__le32 *)(rxdesc) + 0x00), BIT(26))
20 le32_get_bits(*((__le32 *)(rxdesc) + 0x00), BIT(15))
22 le32_get_bits(*((__le32 *)(rxdesc) + 0x00), BIT(14))
24 le32_get_bits(*((__le32 *)(rxdesc) + 0x00), BIT(27))
26 le32_get_bits(*((__le32 *)(rxdesc) + 0x02), BIT(28))
/freebsd-current/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dmac.c37 mt76_set(dev, MT_BBP(CORE, 4), BIT(1));
38 mt76_clear(dev, MT_BBP(CORE, 4), BIT(1));
40 mt76_set(dev, MT_BBP(CORE, 4), BIT(0));
41 mt76_clear(dev, MT_BBP(CORE, 4), BIT(0));
/freebsd-current/sys/dev/liquidio/base/
H A Dcn23xx_pf_regs.h164 #define LIO_CN23XX_PKT_INPUT_CTL_MAC_NUM BIT(29)
170 #define LIO_CN23XX_PKT_INPUT_CTL_IS_64B BIT(24)
171 #define LIO_CN23XX_PKT_INPUT_CTL_RST BIT(23)
172 #define LIO_CN23XX_PKT_INPUT_CTL_QUIET BIT(28)
173 #define LIO_CN23XX_PKT_INPUT_CTL_RING_ENB BIT(22)
174 #define LIO_CN23XX_PKT_INPUT_CTL_DATA_ES_64B_SWAP BIT(6)
175 #define LIO_CN23XX_PKT_INPUT_CTL_USE_CSR BIT(4)
267 #define LIO_CN23XX_PKT_OUTPUT_CTL_TENB BIT(13)
268 #define LIO_CN23XX_PKT_OUTPUT_CTL_CENB BIT(12)
269 #define LIO_CN23XX_PKT_OUTPUT_CTL_IPTR BIT(1
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/freebsd-current/sys/ddb/
H A Ddb_lex.h69 #ifndef BIT
70 #define BIT(n) (1ull << (n)) macro
73 DRT_WSPACE = BIT(_DRT_WSPACE),
74 DRT_HEX = BIT(_DRT_HEX),
/freebsd-current/sys/dev/ice/
H A Dice_fwlog.h61 #define ICE_FWLOG_OPTION_ARQ_ENA BIT(0)
62 #define ICE_FWLOG_OPTION_UART_ENA BIT(1)
66 #define ICE_FWLOG_OPTION_REGISTER_ON_INIT BIT(2)
70 #define ICE_FWLOG_OPTION_IS_REGISTERED BIT(3)
/freebsd-current/sys/dev/gve/
H A Dgve_desc.h82 #define GVE_TXF_L4CSUM BIT(0) /* Need csum offload */
83 #define GVE_TXF_TSTAMP BIT(2) /* Timestamp required */
86 #define GVE_TXSF_IPV6 BIT(1) /* IPv6 TSO */
147 #define GVE_IRQ_ACK BIT(31)
148 #define GVE_IRQ_MASK BIT(30)
149 #define GVE_IRQ_EVENT BIT(29)
/freebsd-current/sys/dev/ocs_fc/
H A Docs_cam.h90 #define OCS_CAM_IO_F_DMAPPED BIT(0) /* associated buffer bus_dmamap'd */
91 #define OCS_CAM_IO_F_ABORT_RECV BIT(1) /* received ABORT TASK */
92 #define OCS_CAM_IO_F_ABORT_DEV BIT(2) /* abort WQE pending */
93 #define OCS_CAM_IO_F_ABORT_TMF BIT(3) /* TMF response sent */
94 #define OCS_CAM_IO_F_ABORT_NOTIFY BIT(4) /* XPT_NOTIFY sent to CTL */
95 #define OCS_CAM_IO_F_ABORT_CAM BIT(5) /* received ABORT or CTIO from CAM */
/freebsd-current/sys/contrib/dev/iwlwifi/
H A Diwl-csr.h91 #define CSR_MAC_SHADOW_REG_CTRL_RX_WAKE BIT(20)
121 #define CSR_HOST_CHICKEN_PM_IDLE_SRC_DIS_SB_PME BIT(19)
178 #define CSR_MBOX_SET_REG_OS_ALIVE BIT(5)
287 #define CSR_GP_CNTRL_REG_FLAG_MAC_INIT BIT(6)
288 #define CSR_GP_CNTRL_REG_FLAG_ROM_START BIT(7)
289 #define CSR_GP_CNTRL_REG_FLAG_MAC_STATUS BIT(20)
290 #define CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ BIT(21)
291 #define CSR_GP_CNTRL_REG_FLAG_BUS_MASTER_DISABLE_STATUS BIT(28)
292 #define CSR_GP_CNTRL_REG_FLAG_BUS_MASTER_DISABLE_REQ BIT(29)
293 #define CSR_GP_CNTRL_REG_FLAG_SW_RESET BIT(3
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H A Diwl-prph.h54 #define DEVICE_SET_NMI_VAL_DRV BIT(7)
57 #define UREG_NIC_SET_NMI_DRIVER_NMI_FROM_DRIVER BIT(24)
58 #define UREG_NIC_SET_NMI_DRIVER_RESET_HANDSHAKE (BIT(24) | BIT(25))
85 #define RELEASE_CPU_RESET_BIT BIT(24)
199 #define SCD_GP_CTRL_ENABLE_31_QUEUES BIT(0)
200 #define SCD_GP_CTRL_AUTO_ACTIVE_MODE BIT(18)
351 #define WFPM_OTP_CFG1_IS_JACKET_BIT BIT(4)
352 #define WFPM_OTP_CFG1_IS_CDB_BIT BIT(5)
368 ENABLE_WFPM = BIT(3
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H A Diwl-context-info-gen3.h19 #define CSR_AUTO_FUNC_BOOT_ENA BIT(1)
21 #define CSR_AUTO_FUNC_INIT BIT(7)
61 IWL_PRPH_SCRATCH_IMR_DEBUG_EN = BIT(1),
62 IWL_PRPH_SCRATCH_EARLY_DEBUG_EN = BIT(4),
63 IWL_PRPH_SCRATCH_EDBG_DEST_DRAM = BIT(8),
64 IWL_PRPH_SCRATCH_EDBG_DEST_INTERNAL = BIT(9),
65 IWL_PRPH_SCRATCH_EDBG_DEST_ST_ARBITER = BIT(10),
66 IWL_PRPH_SCRATCH_EDBG_DEST_TB22DTF = BIT(11),
67 IWL_PRPH_SCRATCH_RB_SIZE_4K = BIT(16),
68 IWL_PRPH_SCRATCH_MTR_MODE = BIT(1
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/freebsd-current/sys/contrib/dev/iwlwifi/fw/api/
H A Drs.h27 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0),
28 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1),
29 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2),
30 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3),
31 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4),
32 IWL_TLC_MNG_CFG_FLAGS_EHT_EXTRA_LTF_MSK = BIT(6),
57 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0),
58 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1),
149 * use BIT(@enum iwl_tlc_mng_cfg_cw)
178 * use BIT(
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H A Dtx.h45 TX_CMD_FLG_PROT_REQUIRE = BIT(0),
46 TX_CMD_FLG_WRITE_TX_POWER = BIT(1),
47 TX_CMD_FLG_ACK = BIT(3),
48 TX_CMD_FLG_STA_RATE = BIT(4),
49 TX_CMD_FLG_BAR = BIT(6),
50 TX_CMD_FLG_TXOP_PROT = BIT(7),
51 TX_CMD_FLG_VHT_NDPA = BIT(8),
52 TX_CMD_FLG_HT_NDPA = BIT(9),
53 TX_CMD_FLG_CSI_FDBK2HOST = BIT(10),
55 TX_CMD_FLG_BT_PRIO_MASK = BIT(1
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H A Dpower.h28 LTR_CFG_FLAG_FEATURE_ENABLE = BIT(0),
29 LTR_CFG_FLAG_HW_DIS_ON_SHADOW_REG_ACCESS = BIT(1),
30 LTR_CFG_FLAG_HW_EN_SHRT_WR_THROUGH = BIT(2),
31 LTR_CFG_FLAG_HW_DIS_ON_D0_2_D3 = BIT(3),
32 LTR_CFG_FLAG_SW_SET_SHORT = BIT(4),
33 LTR_CFG_FLAG_SW_SET_LONG = BIT(5),
34 LTR_CFG_FLAG_DENIE_C10_ON_PD = BIT(6),
35 LTR_CFG_FLAG_UPDATE_VALUES = BIT(7),
94 POWER_FLAGS_POWER_SAVE_ENA_MSK = BIT(0),
95 POWER_FLAGS_POWER_MANAGEMENT_ENA_MSK = BIT(
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/freebsd-current/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02_eeprom.h98 #define MT_EE_ANTENNA_DUAL BIT(15)
103 #define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8)
104 #define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9)
105 #define MT_EE_NIC_CONF_0_PA_IO_CURRENT BIT(10)
108 #define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0)
109 #define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1)
110 #define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2)
111 #define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3)
112 #define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13)
114 #define MT_EE_NIC_CONF_2_ANT_OPT BIT(
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/freebsd-current/contrib/wpa/src/ap/
H A Dsta_info.h21 #define WLAN_STA_AUTH BIT(0)
22 #define WLAN_STA_ASSOC BIT(1)
23 #define WLAN_STA_AUTHORIZED BIT(5)
24 #define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */
25 #define WLAN_STA_SHORT_PREAMBLE BIT(7)
26 #define WLAN_STA_PREAUTH BIT(8)
27 #define WLAN_STA_WMM BIT(9)
28 #define WLAN_STA_MFP BIT(10)
29 #define WLAN_STA_HT BIT(11)
30 #define WLAN_STA_WPS BIT(1
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/freebsd-current/sys/contrib/dev/athk/ath12k/
H A Dhal.h261 #define HAL_WBM_SW_COOKIE_CFG_ALIGN BIT(18)
262 #define HAL_WBM_SW_COOKIE_CFG_RELEASE_PATH_EN BIT(0)
263 #define HAL_WBM_SW_COOKIE_CFG_ERR_PATH_EN BIT(1)
264 #define HAL_WBM_SW_COOKIE_CFG_CONV_IND_EN BIT(3)
266 #define HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW0_EN BIT(1)
267 #define HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW1_EN BIT(2)
268 #define HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW2_EN BIT(3)
269 #define HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW3_EN BIT(4)
270 #define HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN BIT(5)
271 #define HAL_WBM_SW_COOKIE_CONV_CFG_GLOBAL_EN BIT(
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H A Dhal_rx.h245 #define HAL_RX_PPDU_END_USER_STATS_INFO1_FC_VALID BIT(9)
246 #define HAL_RX_PPDU_END_USER_STATS_INFO1_QOS_CTRL_VALID BIT(10)
247 #define HAL_RX_PPDU_END_USER_STATS_INFO1_HT_CTRL_VALID BIT(11)
299 #define HAL_RX_HT_SIG_INFO_INFO0_BW BIT(7)
302 #define HAL_RX_HT_SIG_INFO_INFO1_FEC_CODING BIT(6)
303 #define HAL_RX_HT_SIG_INFO_INFO1_GI BIT(7)
326 #define HAL_RX_VHT_SIG_A_INFO_INFO0_STBC BIT(3)
331 #define HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING BIT(2)
333 #define HAL_RX_VHT_SIG_A_INFO_INFO1_BEAMFORMED BIT(8)
356 #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM BIT(
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/freebsd-current/sys/libkern/
H A Dstrcspn.c35 #define BIT(c) ((u_long)1 << ((u_char)(c) % LONG_BIT)) macro
61 bit = BIT(*charset);
67 bit = BIT(*s1);
H A Dstrspn.c35 #define BIT(c) ((u_long)1 << ((u_char)(c) % LONG_BIT)) macro
60 bit = BIT(*charset);
66 bit = BIT(*s1);
/freebsd-current/lib/libc/string/
H A Dstrspn.c34 #define BIT(c) ((u_long)1 << ((u_char)(c) % LONG_BIT)) macro
59 bit = BIT(*charset);
65 bit = BIT(*s1);
H A Dstrcspn.c34 #define BIT(c) ((u_long)1 << ((u_char)(c) % LONG_BIT)) macro
60 bit = BIT(*charset);
66 bit = BIT(*s1);

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