| /freebsd-13-stable/sys/dev/qlnx/qlnxe/ |
| H A D | ecore_hw.h | 79 #define DMAE_CMD_ENDIANITY 0x3
|
| /freebsd-13-stable/sys/nfs/ |
| H A D | nfs_common.h | 122 #define nfsm_rndup(a) (((a)+3)&(~0x3))
|
| /freebsd-13-stable/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_misc.c | 826 (p_cap->halTxChainMask & 0x3) != 0x3 ||
827 (p_cap->halRxChainMask & 0x3) != 0x3) ?
1390 (val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
2207 if ((mac_dbg.dma_dbg_6 & 0x3) == hang_check.dcu_complete_state) {
2263 if (((mac_dbg.dma_dbg_6 & 0x3) != hang_sig1_val.dcu_complete_state)
3475 | (0x3 << 9)) & ~(0x1 << 27)
3509 | (0x3 << 9)) & ~(0x1 << 27)
3544 | (0x3 <<
[all...] |
| /freebsd-13-stable/sys/dev/bnxt/ |
| H A D | hsi_struct_def.h | 192 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
284 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
459 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
881 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
1077 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT (UINT32_C(0x3) << 1)
1123 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR (UINT32_C(0x3) << 9)
1169 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1859 ((x) == 0x3 ? "DCB_CONFIG_CHANGE": \
1888 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
2132 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
[all...] |
| /freebsd-13-stable/sys/dev/cxgbe/firmware/ |
| H A D | t4fw_interface.h | 524 #define M_FW_FILTER_WR_TXCHAN 0x3
868 #define M_FW_ETH_TX_EO_WR_TSCLK 0x3
1201 FW_RI_SEND = 0x3,
1391 #define M_FW_RI_TPTE_STAGTYPE 0x3
1639 #define M_FW_RI_RES_WR_HOSTFCMODE 0x3
1659 #define M_FW_RI_RES_WR_PCIECHN 0x3
1729 #define M_FW_RI_RES_WR_IQANUD 0x3
1755 #define M_FW_RI_RES_WR_IQPCIECH 0x3
1774 #define M_FW_RI_RES_WR_IQINTCNTTHRESH 0x3
1795 #define M_FW_RI_RES_WR_IQESIZE 0x3
[all...] |
| /freebsd-13-stable/sys/dev/cxgb/common/ |
| H A D | cxgb_regs.h | 455 #define M_ITPARITYERROR 0x3
603 #define M_WFPARERR 0x3
690 #define M_MAXWRBYTECNT 0x3
709 #define M_PCLKRANGE 0x3
809 #define M_RFINIST 0x3
814 #define M_RFRESPRDST 0x3
850 #define M_PIORESPFIFOLEVEL 0x3
895 #define M_PMIST 0x3
900 #define M_CALST 0x3
905 #define M_CFREQRDST 0x3
[all...] |
| H A D | cxgb_mv88e1xxx.c | 71 #define M_PSCR_MDI_XOVER_MODE 0x3
122 #define M_PSSR_SPEED 0x3
|
| /freebsd-13-stable/lib/libnetbsd/ |
| H A D | sockaddr_snprintf.c | 81 sin6->sin6_flowinfo, s[0x0], s[0x1], s[0x2], s[0x3], s[0x4], s[0x5],
105 s[0x0], s[0x1], s[0x2], s[0x3], s[0x4], s[0x5],
|
| /freebsd-13-stable/cddl/contrib/opensolaris/lib/libdtrace/sparc/ |
| H A D | dt_isadep.c | 47 #define OP2_BPr 0x3
281 if (off & 0x3)
|
| /freebsd-13-stable/sys/dev/ata/chipsets/ |
| H A D | ata-ite.c | 202 (reg4a & ~(0x3 << (target << 2))) |
207 pci_write_config(parent, 0x4a, (reg4a & ~(0x3 << (target << 2))),2);
|
| /freebsd-13-stable/sys/dev/e1000/ |
| H A D | e1000_ich8lan.h | 107 #define E1000_FEXTNVM4_BEACON_DURATION_16USEC 0x3
126 #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */
|
| /freebsd-13-stable/sys/dev/pms/RefTisa/sallsdk/spc/ |
| H A D | sadefs.h | 235 #define ABORT_MASK 0x3
237 #define ABORT_SCOPE 0x3 /* bits 0-1*/
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 109 unsigned PQ = (Insn >> PqShift) & 0x3;
123 case 0x3:
|
| /freebsd-13-stable/contrib/opencsd/decoder/include/opencsd/etmv4/ |
| H A D | trc_cmp_cfg_etmv4.h | 225 return ((m_cfg.reg_idr0 >> 10) & 0x3) + 1;
457 return ((m_cfg.reg_configr & (0x3 << 13)) != 0);
|
| /freebsd-13-stable/sys/mips/nlm/dev/net/ |
| H A D | xaui.c | 65 if (xaui_cplx_mask & 0x3) { /* Complexes 0, 1 */
209 val &= ~(0x3 << 11); /* clear soft reset and hard reset */
|
| /freebsd-13-stable/sys/mips/atheros/ |
| H A D | ar71xx_chip.c | 70 #define AR71XX_CPU_DIV_MASK 0x3
72 #define AR71XX_DDR_DIV_MASK 0x3
|
| /freebsd-13-stable/sys/dev/tws/ |
| H A D | tws_hdm.h | 110 #define TWS_SEVERITY_INFO 0x3
198 #define TWS_PARAM_TIME_SCHED_TIME 0x3
|
| /freebsd-13-stable/sys/dev/cxgbe/common/ |
| H A D | t4_hw.h | 151 #define M_RSPD_TYPE 0x3
185 #define M_PPOD_PGSZ 0x3
|
| /freebsd-13-stable/sys/dev/mge/ |
| H A D | if_mgevar.h | 221 #define MGE_SDMA_BURST_8_WORD 0x3
247 #define PORT_SERIAL_MRU_9022 0x3
|
| /freebsd-13-stable/sys/dev/mlx4/ |
| H A D | cmd.h | 49 MLX4_CMD_QUERY_DEV_CAP = 0x3,
204 MLX4_SET_PORT_VLAN_TABLE = 0x3,
|
| /freebsd-13-stable/sys/arm/allwinner/ |
| H A D | aw_usb3phy.c | 55 #define APP_FORCE_VBUS (0x3 << 12)
73 #define PEC_EXTERN_VBUS (0x3 << 1)
|
| /freebsd-13-stable/sys/arm/arm/ |
| H A D | machdep_ptrace.c | 302 switch ((insn >> 23) & 0x3) {
312 case 0x3: /* ldmib */
|
| /freebsd-13-stable/sys/arm64/nvidia/tegra210/ |
| H A D | max77620.h | 119 #define MAX77620_REG_GPIO_INT_GET(x) (((x) >> 5) & 0x3)
120 #define MAX77620_REG_GPIO_INT(x) (((x) & 0x3) << 5)
|
| /freebsd-13-stable/sys/contrib/alpine-hal/ |
| H A D | al_hal_unit_adapter_regs.h | 168 #define AL_ADAPTER_PM_1_PWR_STATE_MASK 0x3 /* PM state mask */
169 #define AL_ADAPTER_PM_1_PWR_STATE_D3 0x3 /* PM D3 state */
|
| /freebsd-13-stable/sys/xen/interface/ |
| H A D | trace.h | 247 #define TRC_HVM_EMUL_RTC_START_TIMER (TRC_HVM_EMUL + 0x3)
271 #define TRC_HW_IRQ_BIND_VECTOR (TRC_HW_IRQ + 0x3)
|