Searched refs:getRegClass (Results 176 - 192 of 192) sorted by relevance

12345678

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp1663 const auto *CarryRC = TRI->getRegClass(AMDGPU::SReg_1_XEXECRegClassID);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMAsmPrinter.cpp384 ARM::GPRPairRegClass.hasSubClassEq(TRI->getRegClass(RC))) {
H A DARMBaseInstrInfo.cpp2307 const TargetRegisterClass *PreviousClass = MRI.getRegClass(FalseReg.getReg());
3359 const TargetRegisterClass *TRC = MRI->getRegClass(Reg);
H A DARMFastISel.cpp2146 const TargetRegisterClass* SrcRC = MRI.getRegClass(SrcReg);
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DGlobalISelEmitter.cpp4427 CodeGenRegisterClass *RC = CGRegs.getRegClass(RCDef);
4612 CodeGenRegisterClass *RC = CGRegs.getRegClass(RCRec);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp3523 MI.getOperand(1).isReg() ? RegInfo.getRegClass(MI.getOperand(1).getReg())
3575 MI.getOperand(1).isReg() ? RegInfo.getRegClass(MI.getOperand(1).getReg())
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp1445 uint32_t Reg = RI->getRegClass(AArch64::GPR32RegClassID).getRegister(
1457 uint32_t Reg = RI->getRegClass(AArch64::GPR64RegClassID).getRegister(
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp390 auto *RC = MRI.getRegClass(DefOp.getReg());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp532 MRI.constrainRegClass(To, MRI.getRegClass(From));
H A DSelectionDAGBuilder.cpp965 const TargetRegisterClass *RC = MRI.getRegClass(Regs.front());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp6846 const MCRegisterClass &GPR = MRI->getRegClass(ARM::GPRRegClassID);
7303 const MCRegisterClass &MRC = MRI->getRegClass(ARM::GPRRegClassID);
7319 Reg1, ARM::gsub_0, &(MRI->getRegClass(ARM::GPRPairRegClassID)));
12186 MRI->getRegClass(ARM::GPRRegClassID).contains(Op.getReg()))
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp11654 const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
12751 const TargetRegisterClass *RC = RegInfo.getRegClass(SrcReg);
12754 assert((RegInfo.getRegClass(DestReg) == &PPC::G8RCRegClass) &&
12761 assert((RegInfo.getRegClass(SrcReg) == &PPC::G8RCRegClass) &&
12762 (RegInfo.getRegClass(DestReg) == &PPC::F8RCRegClass) &&
H A DPPCISelDAGToDAG.cpp390 if (RegInfo->getRegClass(Reg) == &PPC::VRRCRegClass) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3895 if (!MRI.getRegClass(SrcReg)->contains(DestReg))
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp4525 *MRI.getRegClass(CPLoad->getOperand(0).getReg()),
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp8039 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp[all...]

Completed in 652 milliseconds

12345678