/freebsd-13-stable/contrib/sendmail/libsm/ |
H A D | ldap.c | 24 # include <sm/clock.h>
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/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_rtl.h | 401 ThreadClock clock; member in struct:__tsan::ThreadState
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/freebsd-13-stable/sys/contrib/octeon-sdk/ |
H A D | cvmx-usbd.c | 55 #include <asm/octeon/cvmx-clock.h> 65 #include "cvmx-clock.h" 252 /* Try to determine clock type automatically */ 264 /* Check for auto ref clock frequency */ 292 /* 2b. Select the USB reference clock/crystal parameters by writing 296 /* The USB port uses 12/24/48MHz 2.5V board clock 324 /* The USB port uses a 12MHz crystal as clock source 339 setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down such 352 /* 2e. Wait 64 core-clock cycles for HCLK to stabilize */ 354 /* 3. Program the power-on reset field in the USBN clock [all...] |
H A D | cvmx-helper.c | 75 #include <asm/octeon/cvmx-clock.h>
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/freebsd-13-stable/sys/dev/drm2/ |
H A D | drm_irq.c | 465 /* Dot clock in Hz: */ 466 dotclock = (u64) crtc->hwmode.clock * 1000; 476 /* Convert scanline length in pixels and video dot clock to 495 DRM_DEBUG("crtc %d: clock %d kHz framedur %d linedur %d, pixeldur %d\n",
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/freebsd-13-stable/sys/dev/hwpmc/ |
H A D | hwpmc_logging.c | 66 #include <machine/clock.h>
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/freebsd-13-stable/sys/dev/atkbdc/ |
H A D | atkbdc.c | 50 #include <machine/clock.h>
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/freebsd-13-stable/sys/i386/i386/ |
H A D | trap.c | 105 #include <machine/clock.h>
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/freebsd-13-stable/sys/kern/ |
H A D | kern_clocksource.c | 55 #include <machine/clock.h> 718 * Switch to profiling clock rates. 738 * Switch to regular clock rates.
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/freebsd-13-stable/sys/mips/ingenic/ |
H A D | jz4780_clock.c | 58 #include <dt-bindings/clock/jz4780-cgu.h> 61 * JZ4780 CGU clock domain 146 /* OTG PHY clock (reuse gate def structure */ 405 /* Register OTG clock */ 479 "unable to reparent uhc clock\n"); 483 device_printf(sc->dev, "unable to init uhc clock\n"); 485 device_printf(sc->dev, "unable to lookup uhc clock\n"); 709 * clock anyway. Follow their lead blindly. 716 /* Enable OTG, should not be necessary since we use PLL clock */
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/freebsd-13-stable/sys/powerpc/powermac/ |
H A D | pmu.c | 44 #include <sys/clock.h>
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/freebsd-13-stable/sys/amd64/vmm/io/ |
H A D | vrtc.c | 41 #include <sys/clock.h>
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/freebsd-13-stable/sys/arm/allwinner/clkng/ |
H A D | ccu_a31.c | 52 #include <dt-bindings/clock/sun6i-a31-ccu.h>
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/freebsd-13-stable/sys/arm/nvidia/tegra124/ |
H A D | tegra124_clk_per.c | 41 #include <dt-bindings/clock/tegra124-car.h> 374 /* Peripheral clock clock */ 392 /* Basic pheripheral clock */ 722 ("Invalid clock index for enable: %d", idx)); 730 ("Invalid clock index for reset: %d", idx));
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H A D | tegra124_clk_pll.c | 41 #include <dt-bindings/clock/tegra124-car.h> 127 PLLM: Clock source for EMC 2x clock 134 PLLA: Audio clock sources: (11.2896 MHz, 12.288 MHz, 24.576 MHz) 139 PLLE: generate the 100 MHz reference clock for USB 3.0 (spread spectrum) 142 DFLLCPU: DFLL clock source for the fast CPU cluster 219 /* PLLM: 880 MHz Clock source for EMC 2x clock */ 301 /* PLLA: Audio clock sources: (11.2896 MHz, 12.288 MHz, 24.576 MHz) */ 358 /* PLLE: generate the 100 MHz reference clock for USB 3.0 (spread spectrum) */ 780 * PLLD2 is used as source for pixel clock for HDMI. 849 * HDMI specification allows 5% pixel clock toleranc [all...] |
/freebsd-13-stable/sys/arm/nvidia/ |
H A D | tegra_xhci.c | 38 #include <sys/clock.h> 437 device_printf(sc->dev, "Cannot get 'xusb_host' clock\n"); 443 device_printf(sc->dev, "Cannot get 'xusb_falcon_src' clock\n"); 449 device_printf(sc->dev, "Cannot get 'xusb_ss' clock\n"); 455 device_printf(sc->dev, "Cannot get 'xusb_hs_src' clock\n"); 461 device_printf(sc->dev, "Cannot get 'xusb_fs_src' clock\n"); 467 device_printf(sc->dev, "Cannot get 'xusb_gate' clock\n"); 514 /* Setup XUSB ss_src clock first */ 519 /* The XUSB gate clock must be enabled before XUSBA can be powered. */ 523 "Cannot enable 'xusb_gate' clock\ [all...] |
/freebsd-13-stable/sys/arm/ti/am335x/ |
H A D | am335x_lcd.c | 37 #include <sys/clock.h> 468 "clock-frequency", &panel->panel_pxl_clk))) 627 * try to adjust clock to get double of requested frequency 732 /* clock signal settings */
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H A D | tda19988.c | 36 #include <sys/clock.h>
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/freebsd-13-stable/sys/arm64/nvidia/tegra210/ |
H A D | tegra210_clk_per.c | 42 #include <dt-bindings/clock/tegra210-car.h> 482 /* Peripheral clock clock */ 501 /* Basic pheripheral clock */ 836 ("Invalid clock index for enable: %d", idx)); 844 ("Invalid clock index for reset: %d", idx));
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/freebsd-13-stable/sys/arm64/rockchip/ |
H A D | rk805.c | 33 #include <sys/clock.h> 629 /* Register this as a 1Hz clock */ 668 * If the reported year is earlier than 2019, assume the clock is unset.
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/freebsd-13-stable/sys/amd64/amd64/ |
H A D | mp_machdep.c | 69 #include <machine/clock.h>
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/freebsd-13-stable/sys/amd64/linux32/ |
H A D | linux32_machdep.c | 40 #include <sys/clock.h>
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/freebsd-13-stable/sys/x86/x86/ |
H A D | cpu_machdep.c | 77 #include <machine/clock.h> 268 /* Get current clock frequency for the given cpu id. */
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H A D | mp_x86.c | 73 #include <machine/clock.h>
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/freebsd-13-stable/sys/contrib/zstd/programs/ |
H A D | fileio.c | 1498 clock_t const cpuStart = clock(); 1565 { clock_t const cpuEnd = clock();
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