Lines Matching refs:clock
41 #include <dt-bindings/clock/tegra124-car.h>
127 PLLM: Clock source for EMC 2x clock
134 PLLA: Audio clock sources: (11.2896 MHz, 12.288 MHz, 24.576 MHz)
139 PLLE: generate the 100 MHz reference clock for USB 3.0 (spread spectrum)
142 DFLLCPU: DFLL clock source for the fast CPU cluster
219 /* PLLM: 880 MHz Clock source for EMC 2x clock */
301 /* PLLA: Audio clock sources: (11.2896 MHz, 12.288 MHz, 24.576 MHz) */
358 /* PLLE: generate the 100 MHz reference clock for USB 3.0 (spread spectrum) */
780 * PLLD2 is used as source for pixel clock for HDMI.
849 * HDMI specification allows 5% pixel clock tolerance,
1076 * XXX Simplified UTMIP settings for 12MHz base clock.