| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUPALMetadata.cpp | 263 static const char *getRegisterName(unsigned RegNum) { argument
589 for (; Entry->Num && Entry->Num != RegNum; ++Entry)
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 2428 unsigned RegNum;
2436 RegNum = RegLst & 0xf;
2439 if (RegNum > 9)
2442 for (unsigned i = 0; i < RegNum; i++)
2465 unsigned RegNum = RegLst & 0x3; local
2467 for (unsigned i = 0; i <= RegNum; i++)
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 265 Register RegNum; member in struct:__anon4287::RISCVOperand::RegOp
338 return Kind == KindTy::Register && Reg.RegNum == RISCV::V0;
347 RISCVMCRegisterClasses[RISCV::GPRRegClassID].contains(Reg.RegNum);
729 return Reg.RegNum.id();
827 Op->Reg.RegNum = RegNo;
976 Op.Reg.RegNum = convertFPR64ToFPR32(Reg);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 396 unsigned RegNum = MRI->getDwarfRegNum(Reg, true); local
398 MCCFIInstruction::createDefCfaRegister(nullptr, RegNum));
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDILCFGStructurizer.cpp | 231 int RegNum, const DebugLoc &DL);
505 int RegNum, const DebugLoc &DL) {
510 MachineInstrBuilder(*MF, NewInstr).addReg(RegNum, false);
503 insertCondBranchBefore( MachineBasicBlock *blk, MachineBasicBlock::iterator I, int NewOpcode, int RegNum, const DebugLoc &DL) argument
|
| /freebsd-13-stable/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | TargetInfo.h | 1076 const unsigned RegNum; member in struct:clang::TargetInfo::AddlRegName
|
| /freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1630 unsigned RegNum = Reg.EnumValue; local
1631 if (AllocatableRegs.count(RegNum))
1634 UberSetIDs.join(0, RegNum);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 1100 if (unsigned RegNum = MO2.getReg()) {
1102 printRegName(O, RegNum);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 79 uint64_t RegNum = cast<ConstantSDNode>(RegIdx)->getZExtValue(); local
80 return Mips::MSACtrlRegClass.getRegister(RegNum);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 289 unsigned RegNum = RegMap[Reg]; local
315 Ret |= (RegNum & 0x0FFFFFFF);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1069 unsigned RegNum = MO.isUndef() ? std::numeric_limits<unsigned>::max() local
1074 if (RegNum <= PRegNum)
1079 else if (!isNotVFP && RegNum != PRegNum+1)
1098 PRegNum = RegNum;
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 1404 unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
1406 MCCFIInstruction::createDefCfaRegister(nullptr, RegNum));
1413 unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
1415 MCCFIInstruction::cfiDefCfa(nullptr, RegNum, Offset));
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 145 unsigned RegNum = State.getFirstUnallocated(ArgRegs); local
147 // RegNum is an index into ArgRegs: skip a register if RegNum is odd.
148 if (RegNum != NumArgRegs && RegNum % 2 == 1)
149 State.AllocateReg(ArgRegs[RegNum]);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 1797 auto GetRegisterName = [](unsigned RegNum) -> StringRef {
1798 return X86ATTInstPrinter::getRegisterName(RegNum);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 6687 int64_t RegNum = Token.getIntVal(); local
6688 if (RegNum < 0 || RegNum > 31) {
6695 RegNum, Token.getString(), getContext().getRegisterInfo(), S,
|