Searched refs:LW (Results 26 - 42 of 42) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp211 return Mips::LW;
390 MachineInstr *LW = local
391 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
397 if (!constrainSelectedInstRegOperands(*LW, TII, TRI, RBI))
402 LW->getOperand(0).setReg(DestTmp);
669 MachineInstr *LWGOT = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
725 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
H A DMicroMipsSizeReduction.cpp157 // Attempts to reduce LW/SW instruction into LWSP/SWSP,
161 // Attempts to reduce two LW/SW instructions into LWP/SWP instruction,
240 {RT_TwoInstr, OpCodes(Mips::LW, Mips::LWP_MM), ReduceXWtoXWP,
242 {RT_OneInstr, OpCodes(Mips::LW, Mips::LWSP_MM), ReduceXWtoXWSP,
355 !(MI->getOpcode() == Mips::LW || MI->getOpcode() == Mips::LW_MM ||
468 bool ReduceToLwp = (MI1->getOpcode() == Mips::LW) ||
H A DMipsSEInstrInfo.cpp49 if ((Opc == Mips::LW) || (Opc == Mips::LD) ||
333 Opc = Mips::LW;
362 Opc = Mips::LW;
366 Opc = Mips::LW;
H A DMipsFastISel.cpp422 emitInst(Mips::LW, DestReg)
439 emitInst(Mips::LW, DestReg)
766 Opc = Mips::LW;
H A DMipsBranchExpansion.cpp514 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA)
H A DMipsISelLowering.cpp4763 BuildMI(*BB, I, DL, TII->get(Mips::LW))
4819 BuildMI(*BB, I, DL, TII->get(Mips::LW))
4823 BuildMI(*BB, I, DL, TII->get(Mips::LW))
/freebsd-13-stable/contrib/kyua/utils/fs/
H A Doperations.cpp573 LW(F("Failed to delete just-created temporary directory %s")
796 LW(F("%s busy; unmount retries left %s") % mount_point % retries);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp224 case Mips::LW:
H A DMipsTargetStreamer.cpp296 emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI);
1211 // and adds a corresponding LW after every JAL.
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp214 case RISCV::LW:
H A DRISCVInstrInfo.cpp48 case RISCV::LW:
153 RISCV::LW : RISCV::LD;
H A DRISCVISelDAGToDAG.cpp534 case RISCV::LW:
H A DRISCVISelLowering.cpp1266 BuildMI(*BB, MI, DL, TII.get(RISCV::LW), LoReg)
1270 BuildMI(*BB, MI, DL, TII.get(RISCV::LW), HiReg)
/freebsd-13-stable/contrib/kyua/engine/
H A Dscheduler.cpp832 LW(F("Failed to run cleanup routine for %s:%s on abrupt "
1065 LW(F("Failed to load test cases list: %s") % e.what());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp2200 SecondOpcode = isRV64() ? RISCV::LD : RISCV::LW;
2219 unsigned SecondOpcode = isRV64() ? RISCV::LD : RISCV::LW;
2407 emitLoadStoreSymbol(Inst, RISCV::LW, IDLoc, Out, /*HasTmpReg=*/false);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2356 // We need a NOP between the JALR and the LW:
2952 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, DstReg, DstReg,
2957 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, DstReg, GPReg,
2997 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, TmpReg,
3064 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, GPReg,
3297 TOut.emitRRX(Mips::LW, ATReg, GPReg, MCOperand::createExpr(GotExpr),
3487 TOut.emitRRI(Mips::LW, FirstReg, TmpReg, 0, IDLoc, STI);
3488 TOut.emitRRI(Mips::LW, nextReg(FirstReg), TmpReg, 4, IDLoc, STI);
5283 unsigned Opcode = IsLoad ? Mips::LW : Mips::SW;
/freebsd-13-stable/contrib/netbsd-tests/usr.bin/netpgpverify/
H A Dt_netpgpverify.sh4283 c68kA9KJ6vvhsXsbdzRhKzSCcTXKZC1XufrByw/LW+uJ2SAGe1BVrAOcptcKoRYb

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