/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVFrameLowering.h | 33 Register &FrameReg) const override;
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H A D | RISCVFrameLowering.cpp | 464 Register &FrameReg) const { 487 FrameReg = RISCV::X2; 498 FrameReg = RISCVABI::getBPReg(); 500 FrameReg = RISCV::X2; 505 FrameReg = RI->getFrameRegister(MF);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEFrameLowering.h | 52 Register &FrameReg) const override;
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H A D | VEFrameLowering.cpp | 324 Register &FrameReg) const { 335 FrameReg = VE::SX11; // %sp 343 FrameReg = VE::SX17; // %bp 345 FrameReg = VE::SX11; // %sp 349 FrameReg = RegInfo->getFrameRegister(MF);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | Thumb2InstrInfo.cpp | 474 Register FrameReg, int &Offset, 499 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false); 520 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false); 534 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false); 568 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false); 663 (Register::isVirtualRegister(FrameReg) || 664 RegClass->contains(FrameReg))) { 665 if (Register::isVirtualRegister(FrameReg)) { 668 if (!MRI->constrainRegClass(FrameReg, RegClass)) 673 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, fals [all...] |
H A D | ARMBaseRegisterInfo.cpp | 771 Register FrameReg; local 773 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj); 780 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){ 795 Done = rewriteARMFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII); 798 Done = rewriteT2FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII, this); 827 (Register::isVirtualRegister(FrameReg) || RegClass->contains(FrameReg))) 829 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false); 833 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, 837 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, [all...] |
H A D | ARMFrameLowering.cpp | 887 Register &FrameReg) const { 888 return ResolveFrameIndexReference(MF, FI, FrameReg, 0); 892 int FI, Register &FrameReg, 902 FrameReg = ARM::SP; 914 FrameReg = RegInfo->getFrameRegister(MF); 919 FrameReg = RegInfo->getBaseRegister(); 930 FrameReg = RegInfo->getFrameRegister(MF); 939 FrameReg = RegInfo->getFrameRegister(MF); 954 FrameReg = RegInfo->getFrameRegister(MF); 959 FrameReg 891 ResolveFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg, int SPAdj) const argument [all...] |
H A D | ARMBaseInstrInfo.h | 755 Register FrameReg, int &Offset, 759 Register FrameReg, int &Offset,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.h | 86 // This is to adjust some FrameReg. We return the new register to be used 87 // in place of FrameReg and the adjusted immediate field (&NewImm) 88 unsigned loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB,
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H A D | Mips16InstrInfo.cpp | 320 unsigned Mips16InstrInfo::loadImmediate(unsigned FrameReg, int64_t Imm, argument 402 if (FrameReg == Mips::SP) { 422 BuildMI(MBB, II, DL, get(Mips:: AdduRxRyRz16), Reg).addReg(FrameReg)
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H A D | MipsSEFrameLowering.cpp | 779 Register &FrameReg) const { 784 FrameReg = hasFP(MF) ? ABI.GetFramePtr() : ABI.GetStackPtr(); 786 FrameReg = hasBP(MF) ? ABI.GetBasePtr() : ABI.GetStackPtr();
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H A D | MipsTargetStreamer.h | 197 unsigned FrameReg; member in class:llvm::MipsTargetStreamer
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | GCRootLowering.cpp | 297 Register FrameReg; // FIXME: surely GCRoot ought to store the local 299 RI->StackOffset = TFI->getFrameIndexReference(MF, RI->Num, FrameReg);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.h | 106 Register &FrameReg) const override; 113 Register &FrameReg,
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H A D | X86RegisterInfo.cpp | 801 Register FrameReg = getFrameRegister(MF); local 803 FrameReg = getX86SubSuperRegister(FrameReg, 32); 804 return FrameReg;
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H A D | X86FrameLowering.cpp | 1744 Register FrameReg; 1746 int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg); 1748 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg, 2147 Register &FrameReg) const { 2155 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister(); 2157 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister(); 2159 FrameReg = TRI->getFrameRegister(MF); 2241 Register &FrameReg) const { 2248 return getFrameIndexReference(MF, FI, FrameReg); 2250 FrameReg [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 262 Register &FrameReg) const { 297 FrameReg = RegInfo->getFrameRegister(MF); 300 FrameReg = SP::O6; // %sp
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.cpp | 343 MCRegister FrameReg = MFI->getFrameOffsetReg(); 344 if (FrameReg) { 345 reserveRegisterTuples(Reserved, FrameReg); 346 assert(!isSubRegister(ScratchRSrcReg, FrameReg)); 933 Register FrameReg = FrameInfo.isFixedObjectIndex(Index) && hasBasePointer(*MF) local 948 MFI->getScratchRSrcReg(), FrameReg, 953 IsKill, MFI->getScratchRSrcReg(), FrameReg, 1225 Register FrameReg = FrameInfo.isFixedObjectIndex(Index) && hasBasePointer(*MF) local 1281 FrameReg, 1311 FrameReg, [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DbgEntityHistoryCalculator.cpp | 238 Register FrameReg = TRI->getFrameRegister(*MF); local 288 else if (MO.getReg() != FrameReg ||
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 1823 Register &FrameReg) const { 1825 MF, FI, FrameReg, 1866 const MachineFunction &MF, int FI, Register &FrameReg, bool PreferFP, 1872 return resolveFrameOffsetReference(MF, ObjectOffset, isFixed, isSVE, FrameReg, 1878 Register &FrameReg, bool PreferFP, bool ForSimm) const { 1972 FrameReg = RegInfo->getFrameRegister(MF); 1976 FrameReg = RegInfo->hasBasePointer(MF) ? RegInfo->getBaseRegister() 1988 FrameReg = RegInfo->getFrameRegister(MF); 1994 FrameReg = RegInfo->getBaseRegister(); 1998 FrameReg 1865 resolveFrameIndexReference( const MachineFunction &MF, int FI, Register &FrameReg, bool PreferFP, bool ForSimm) const argument 1876 resolveFrameOffsetReference( const MachineFunction &MF, int64_t ObjectOffset, bool isFixed, bool isSVE, Register &FrameReg, bool PreferFP, bool ForSimm) const argument 2849 Register FrameReg; member in class:__anon3852::TagStoreEdit 3223 getFrameIndexReferencePreferSP( const MachineFunction &MF, int FI, Register &FrameReg, bool IgnoreSPUpdates) const argument [all...] |
H A D | AArch64ExpandPseudoInsts.cpp | 967 Register FrameReg; local 969 MF, BaseOffset, false /*isFixed*/, false /*isSVE*/, FrameReg, 972 Register SrcReg = FrameReg; 976 emitFrameOffset(MBB, &MI, MI.getDebugLoc(), SrcReg, FrameReg,
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H A D | AArch64InstrInfo.h | 340 unsigned FrameReg, StackOffset &Offset,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonFrameLowering.h | 86 Register &FrameReg) const override;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 721 Register FrameReg = ARI.getFrameRegister(MF); local 722 return DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, VT);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 720 Register &FrameReg) const { 724 TargetFrameLowering::getFrameIndexReference(MF, FI, FrameReg);
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