Searched refs:FSUB (Results 26 - 34 of 34) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1859 return selectBinaryOp(I, ISD::FSUB);
H A DSelectionDAG.cpp4139 case ISD::FSUB:
5158 case ISD::FSUB:
5187 case ISD::FSUB:
5328 case ISD::FSUB:
7445 if (Opcode == ISD::FSUB)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1651 case FSub: return ISD::FSUB;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp312 setOperationAction(ISD::FSUB, MVT::f128, Custom);
484 setOperationAction(ISD::FSUB, MVT::f16, Promote);
504 setOperationAction(ISD::FSUB, MVT::v4f16, Promote);
508 AddPromotedToType(ISD::FSUB, MVT::v4f16, MVT::v4f32);
541 setOperationAction(ISD::FSUB, MVT::v8f16, Expand);
782 setOperationAction(ISD::FSUB, MVT::v1f64, Expand);
3477 case ISD::FSUB:
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp804 setTargetDAGCombine(ISD::FSUB);
9070 case ISD::FSUB:
9244 case ISD::FSUB:
9841 case ISD::FSUB:
10523 case ISD::FSUB:
H A DR600ISelLowering.cpp154 setOperationAction(ISD::FSUB, MVT::f32, Expand);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp520 for (const auto &Op : {ISD::FADD, ISD::FMUL, ISD::FSUB, ISD::FMA}) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp814 setOperationAction(ISD::FSUB, MVT::v2f64, Expand);
998 setOperationAction(ISD::FSUB, MVT::f64, Expand);
12510 Opcode != ISD::FADD && Opcode != ISD::FSUB) {
12513 Opcode != ISD::FADD && Opcode != ISD::FSUB)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp501 setOperationAction(ISD::FSUB, MVT::v2f64, Legal);
533 setOperationAction(ISD::FSUB, MVT::v4f32, Legal);

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