Searched refs:Def (Results 76 - 100 of 182) sorted by relevance

12345678

/freebsd-13-stable/contrib/llvm-project/clang/include/clang/Lex/
H A DPreprocessingRecord.h189 if (MacroDefinitionRecord *Def = getDefinition())
190 return Def->getName();
396 void RegisterMacroDefinition(MacroInfo *Macro, MacroDefinitionRecord *Def);
H A DMacroInfo.h385 if (const DefInfo Def = getDefinition())
386 return !Def.isUndefined();
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp1377 MachineInstr *Def = MRI->getVRegDef(MO->getReg()); local
1378 LoopFeederPhi.insert(std::make_pair(MO->getReg(), Def));
1438 MachineInstr *Def = MRI->getVRegDef(Reg);
1439 if (!Def)
1444 if (Def->isPHI() && !phiMayWrapOrUnderflow(Def, EndVal, Def->getParent(),
1447 if (Def->isCopy() && !loopCountMayWrapOrUnderFlow(&(Def->getOperand(1)),
1448 EndVal, Def
[all...]
H A DHexagonSubtarget.h261 void adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx,
H A DRDFCopy.cpp92 if (RA.Addr->getKind() == NodeAttrs::Def)
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DMemorySSAUpdater.h89 void insertDef(MemoryDef *Def, bool RenameUses = false);
273 // (MemoryAccess Phi or Def). VMap maps old instructions to cloned
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetSubtargetInfo.h231 // and UseOpIdx are the indices of the operands in Def and Use, respectively.
233 virtual void adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, argument
/freebsd-13-stable/contrib/llvm-project/clang/lib/Lex/
H A DPPLexerChange.cpp793 MacroInfo *Def = nullptr;
795 Def = DefMD->getInfo();
802 if (Def || !Macro.getOverriddenMacros().empty())
803 addModuleMacro(LeavingMod, II, Def,
H A DPreprocessor.cpp363 Def = I->second.findDirectiveAtLoc(Loc, SourceMgr); local
364 if (!Def || !Def.getMacroInfo())
366 if (!Def.getMacroInfo()->isObjectLike())
368 if (!MacroDefinitionEquals(Def.getMacroInfo(), Tokens))
370 SourceLocation Location = Def.getLocation();
/freebsd-13-stable/contrib/llvm-project/llvm/lib/TableGen/
H A DTGLexer.h49 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator in enum:llvm::tgtok::TokKind
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveIntervals.cpp358 SlotIndex Def = VNI->def; local
359 LR.addSegment(LiveRange::Segment(Def, Def.getDeadSlot(), VNI));
511 SlotIndex Def = VNI->def; local
512 LiveRange::iterator I = LI.FindSegmentContaining(Def);
519 if ((I == LI.begin() || std::prev(I)->end < Def) && !VNI->isPHIDef()) {
520 MachineInstr *MI = getInstructionFromIndex(Def);
525 if (I->end != Def.getDeadSlot())
531 LLVM_DEBUG(dbgs() << "Dead PHI at " << Def << " may separate interval\n");
535 MachineInstr *MI = getInstructionFromIndex(Def);
[all...]
H A DRenameIndependentSubregs.cpp323 SlotIndex Def = VNI.def; local
324 MachineBasicBlock &MBB = *Indexes.getMBBFromIndex(Def);
H A DExecutionDomainFix.cpp340 const int Def = RDA->getReachingDef(mi, RC->getRegister(rx));
342 return RDA->getReachingDef(mi, RC->getRegister(I)) <= Def;
H A DMachinePipeliner.cpp2275 MachineInstr *Def = MRI.getVRegDef(Reg); local
2276 while (Def->isPHI()) {
2277 if (!Visited.insert(Def).second)
2279 for (unsigned i = 1, e = Def->getNumOperands(); i < e; i += 2)
2280 if (Def->getOperand(i + 1).getMBB() == BB) {
2281 Def = MRI.getVRegDef(Def->getOperand(i).getReg());
2285 return Def;
2341 MachineInstr *Def = MRI.getVRegDef(BaseOpS->getReg());
2342 if (!Def || !De
2709 isLoopCarriedDefOfUse(SwingSchedulerDAG *SSD, MachineInstr *Def, MachineOperand &MO) argument
[all...]
H A DSplitKit.h109 /// 3. | o---| Def, live-out.
441 unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def);
/freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DModuleBuilder.cpp119 if (auto Def = TD->getDefinition())
120 return Def;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DDeadStoreElimination.cpp1625 /// Returns true if \p Def is not read before returning from the function.
1626 bool isWriteAtEndOfFunction(MemoryDef *Def) { argument
1627 LLVM_DEBUG(dbgs() << " Check if def " << *Def << " ("
1628 << *Def->getMemoryInst()
1631 auto MaybeLoc = getLocForWriteEx(Def->getMemoryInst());
1645 PushMemUses(Def);
1847 // 1 = Def(LoE) ; <----- DomDef stores [0,1]
1848 // 2 = Def(1) ; (2, 1) = NoAlias, stores [2,3]
1850 // (The Use points to the *first* Def it may alias)
1851 // 3 = Def(
2033 MemoryDef *Def = MemDefs[I]; local
2068 storeIsNoop(MemoryDef *Def, MemoryLocation DefLoc, const Value *DefUO) argument
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.cpp721 int GCNHazardRecognizer::checkVALUHazardsHelper(const MachineOperand &Def, argument
730 if (!TRI->isVGPR(MRI, Def.getReg()))
732 Register Reg = Def.getReg();
754 for (const MachineOperand &Def : VALU->defs()) {
755 WaitStatesNeeded = std::max(WaitStatesNeeded, checkVALUHazardsHelper(Def, MRI));
924 for (const MachineOperand &Def : MI->defs()) {
925 MachineOperand *Op = I->findRegisterUseOperand(Def.getReg(), false, TRI);
H A DSIShrinkInstructions.cpp82 MachineInstr *Def = MRI.getUniqueVRegDef(Reg); local
83 if (Def && Def->isMoveImmediate()) {
84 MachineOperand &MovSrc = Def->getOperand(1);
106 Def->eraseFromParent();
H A DSILoadStoreOptimizer.cpp628 // If one of the defs is read, then there is a use of Def between I and the
1719 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg());
1720 if (!Def || Def->getOpcode() != AMDGPU::S_MOV_B32 ||
1721 !Def->getOperand(1).isImm())
1724 return Def->getOperand(1).getImm();
1742 MachineInstr *Def = MRI->getUniqueVRegDef(Base.getReg());
1743 if (!Def || Def->getOpcode() != AMDGPU::REG_SEQUENCE
1744 || Def
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp456 Register Def = Inst->getOperand(DefRegIdx).getReg(); local
461 // When Def is physreg: use given input.
463 // When Def is vreg: copy input to new vreg with same reg class as Def.
464 if (Def.isVirtual()) {
465 In = MRI->createVirtualRegister(MRI->getRegClass(Def));
470 // Add Flag and input register operand (In) to Inst. Tie In to Def.
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp509 for (auto Def : MI.defs()) {
510 if (Def.isDead())
518 Modified |= makeGPRSpeculationSafe(MBB, NextMBBI, MI, Def.getReg());
/freebsd-13-stable/contrib/llvm-project/clang/lib/AST/
H A DDeclObjC.cpp96 if (const ObjCProtocolDecl *Def = Proto->getDefinition())
97 if (!Def->isUnconditionallyVisible() && !AllowHidden)
183 if (const ObjCProtocolDecl *Def = Proto->getDefinition())
184 if (!Def->isUnconditionallyVisible())
241 if (const ObjCProtocolDecl *Def = Proto->getDefinition())
242 if (!Def->isUnconditionallyVisible())
1574 if (const ObjCInterfaceDecl *Def = getDefinition()) {
1579 const_cast<ObjCInterfaceDecl*>(Def));
1921 const ObjCProtocolDecl *Def = getDefinition(); local
1922 if (!Def || !De
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DFixedLenDecoderEmitter.cpp1813 const Record &Def = *CGI.TheDef;
1842 DagInit *Out = Def.getValueAsDag("OutOperandList");
1843 DagInit *In = Def.getValueAsDag("InOperandList");
1870 const std::vector<RecordVal> &Vals = Def.getValues();
1947 LLVM_DEBUG(dbgs() << "Numbered operand mapping for " << Def.getName()
2465 const Record *Def = Inst->TheDef;
2467 if (Def->getValueAsString("Namespace") == "TargetOpcode" ||
2468 Def->getValueAsBit("isPseudo") ||
2469 Def->getValueAsBit("isAsmParserOnly") ||
2470 Def
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyIndVar.cpp799 /// Add all uses of Def to the current IV's worklist.
801 Instruction *Def, Loop *L,
805 for (User *U : Def->users()) {
810 // If Def is a LoopPhi, it may not be in the Simplified set, so check for
812 if (UI == Def)
824 SimpleIVUsers.push_back(std::make_pair(UI, Def));
800 pushIVUsers( Instruction *Def, Loop *L, SmallPtrSet<Instruction*,16> &Simplified, SmallVectorImpl< std::pair<Instruction*,Instruction*> > &SimpleIVUsers) argument

Completed in 273 milliseconds

12345678