Searched refs:CreateReg (Results 51 - 60 of 60) sorted by relevance
123
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 1640 return MachineOperand::CreateReg(Reg, false);
|
| H A D | SIInstrInfo.cpp | 4240 return MachineOperand::CreateReg(SubReg, false);
4650 Copy->addOperand(MachineOperand::CreateReg(AMDGPU::EXEC, false, true));
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3516 static std::unique_ptr<ARMOperand> CreateReg(unsigned RegNum, SMLoc S, function
4131 Operands.push_back(ARMOperand::CreateReg(RegNo, RegStartLoc, RegEndLoc));
6865 ARMOperand::CreateReg(PairedReg, Op2.getStartLoc(), Op2.getEndLoc()));
6927 ARMOperand::CreateReg(RPair, Op2.getStartLoc(), Op2.getEndLoc());
7321 ARMOperand::CreateReg(NewReg, Op1.getStartLoc(), Op2.getEndLoc());
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 924 static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser, function in class:__anon3940::AMDGPUOperand
2411 return AMDGPUOperand::CreateReg(this, Reg, StartLoc, EndLoc);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2533 RegList.push_back(MachineOperand::CreateReg(CurReg, false, false,
2555 RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false,
|
| H A D | ARMISelLowering.cpp | 11327 MI.addOperand(MachineOperand::CreateReg(0, /*isDef=*/true));
11347 MI.addOperand(MachineOperand::CreateReg(0, /*isDef=*/false));
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.cpp | 1482 NewMI.addOperand(MachineOperand::CreateReg(
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 2475 FuncInfo.CreateReg(TLI.getPointerTy(DAG.getDataLayout()));
2687 B.Reg = FuncInfo.CreateReg(B.RegVT);
5471 Op = MachineOperand::CreateReg(Reg, false);
5538 Op = MachineOperand::CreateReg(VMI->second, false);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1286 unsigned AR = FuncInfo->CreateReg(MVT::i32);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 12091 MI.addOperand(MachineOperand::CreateReg(PPC::X2, false, true));
|
Completed in 636 milliseconds
123