Searched refs:Base (Results 26 - 50 of 454) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/clang/lib/AST/Interp/
H A DRecord.cpp19 for (Base &V : SrcVirtualBases)
22 for (Base &B : Bases)
26 for (Base &V : VirtualBases)
36 const Record::Base *Record::getBase(const RecordDecl *FD) const {
42 const Record::Base *Record::getVirtualBase(const RecordDecl *FD) const {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelDAGToDAG.cpp47 bool SelectFrameADDR_ri(SDValue Addr, SDValue &Base, SDValue &Offset);
48 bool SelectAddrModeS9(SDValue Addr, SDValue &Base, SDValue &Offset);
49 bool SelectAddrModeImm(SDValue Addr, SDValue &Base, SDValue &Offset);
50 bool SelectAddrModeFar(SDValue Addr, SDValue &Base, SDValue &Offset);
75 bool ARCDAGToDAGISel::SelectAddrModeImm(SDValue Addr, SDValue &Base, argument
78 Base = Addr.getOperand(0);
85 bool ARCDAGToDAGISel::SelectAddrModeS9(SDValue Addr, SDValue &Base, argument
96 Base = CurDAG->getTargetFrameIndex(
99 Base = Addr;
113 Base
127 SelectAddrModeFar(SDValue Addr, SDValue &Base, SDValue &Offset) argument
146 SelectFrameADDR_ri(SDValue Addr, SDValue &Base, SDValue &Offset) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/GSYM/
H A DLookupResult.h25 StringRef Base; ///< Line entry source file basename. member in struct:llvm::gsym::SourceLocation
32 LHS.Base == RHS.Base && LHS.Line == RHS.Line &&
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/Tooling/Refactoring/
H A DRefactoringActionRulesInternal.h96 template <typename Base, typename First, typename... Rest>
97 struct HasBaseOf : std::conditional<HasBaseOf<Base, First>::value ||
98 HasBaseOf<Base, Rest...>::value,
101 template <typename Base, typename T>
102 struct HasBaseOf<Base, T> : std::is_base_of<Base, T> {};
105 /// derive from Base.
106 template <typename Base, typename First, typename... Rest>
107 struct AreBaseOf : std::conditional<AreBaseOf<Base, First>::value &&
108 AreBaseOf<Base, Res
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanTransforms.cpp30 for (VPBlockBase *Base : RPOT) {
31 VPBasicBlock *VPBB = Base->getEntryBasicBlock();
38 for (VPBlockBase *Base : RPOT) {
40 if (Base->getNumPredecessors() == 0 || Base->getNumSuccessors() == 0)
43 VPBasicBlock *VPBB = Base->getEntryBasicBlock();
/freebsd-13-stable/contrib/llvm-project/clang/lib/AST/
H A DInheritViz.cpp95 for (const auto &Base : Decl->bases()) {
96 QualType CanonBaseType = Context.getCanonicalType(Base.getType());
100 if (!Base.isVirtual())
104 WriteNode(Base.getType(), Base.isVirtual());
110 WriteNodeReference(Base.getType(), Base.isVirtual());
113 if (Base.isVirtual()) {
/freebsd-13-stable/contrib/ntp/kernel/sys/
H A Dpcl720.h49 #define pcl720_load(Base,Cntr,Mode,Val) \
50 ({ register unsigned int b = Base, c = Cntr, v = Val; \
63 #define pcl720_read(Base,Cntr) \
64 ({ register unsigned int b = Base, v; \
75 #define pcl720_input(Base) \
76 ({ register unsigned int b = Base, v; \
85 #define pcl720_output(Base,Value) \
86 ({ register unsigned int b = Base, v = Value; \
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRTargetObjectFile.h18 typedef TargetLoweringObjectFileELF Base; typedef in class:llvm::AVRTargetObjectFile
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp214 uint64_t Base = Imm >> 16;
217 assert(Base < 32 && "Invalid base register");
228 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base]));
235 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base]));
240 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base]));
249 uint64_t Base = Imm >> 14;
252 assert(Base < 32 && "Invalid base register");
256 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base]));
258 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base]));
261 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base]));
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/freebsd-13-stable/contrib/llvm-project/lldb/include/lldb/Utility/
H A DTimeout.h36 using Base = llvm::Optional<Dur<Ratio>>;
39 Timeout(llvm::NoneType none) : Base(none) {}
45 : Base(other ? Base(Dur<Ratio>(*other)) : llvm::None) {}
50 : Base(Dur<Ratio>(other)) {}
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.h85 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
87 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base,
89 bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base,
91 bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base,
93 bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base,
95 bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base,
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Support/
H A DYAMLParser.h327 basic_collection_iterator(BaseT *B) : Base(B) {}
330 assert(Base && Base->CurrentEntry && "Attempted to access end iterator!");
331 return Base->CurrentEntry;
335 assert(Base && Base->CurrentEntry &&
337 return *Base->CurrentEntry;
341 assert(Base && Base->CurrentEntry && "Attempted to access end iterator!");
342 return Base
375 BaseT *Base = nullptr; member in class:llvm::yaml::basic_collection_iterator
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp186 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); local
188 assert(isUInt<4>(Base) && isUInt<12>(Disp));
189 return (Base << 12) | Disp;
196 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); local
198 assert(isUInt<4>(Base) && isInt<20>(Disp));
199 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12);
206 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); local
209 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index));
210 return (Index << 16) | (Base << 12) | Disp;
217 uint64_t Base local
229 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); local
240 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); local
251 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); local
262 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); local
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H A DSystemZInstPrinter.cpp26 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp, argument
29 if (Base || Index) {
33 if (Base)
36 if (Base)
37 O << '%' << getRegisterName(Base);
202 unsigned Base = MI->getOperand(OpNum).getReg(); local
206 if (Base)
207 O << ",%" << getRegisterName(Base);
213 unsigned Base = MI->getOperand(OpNum).getReg(); local
217 if (Base)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp76 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base, argument
82 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base, argument
88 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base, argument
94 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Addr, SDValue &Base, argument
100 bool MipsDAGToDAGISel::selectIntAddr12MM(SDValue Addr, SDValue &Base, argument
106 bool MipsDAGToDAGISel::selectIntAddr16MM(SDValue Addr, SDValue &Base, argument
112 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, argument
118 bool MipsDAGToDAGISel::selectIntAddrSImm10(SDValue Addr, SDValue &Base, argument
124 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base, argument
130 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base, argument
136 selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base, SDValue &Offset) const argument
142 selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset) argument
148 selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset) argument
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H A DMips16ISelDAGToDAG.h32 bool selectAddr(bool SPAllowed, SDValue Addr, SDValue &Base,
34 bool selectAddr16(SDValue Addr, SDValue &Base,
36 bool selectAddr16SP(SDValue Addr, SDValue &Base,
H A DMips16ISelDAGToDAG.cpp98 bool Mips16DAGToDAGISel::selectAddr(bool SPAllowed, SDValue Addr, SDValue &Base, argument
106 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy);
113 Base = Addr.getOperand(0);
130 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy);
136 Base = Addr.getOperand(0);
156 Base = Addr.getOperand(0);
162 Base = Addr;
167 bool Mips16DAGToDAGISel::selectAddr16(SDValue Addr, SDValue &Base, argument
169 return selectAddr(false, Addr, Base, Offset);
172 bool Mips16DAGToDAGISel::selectAddr16SP(SDValue Addr, SDValue &Base, argument
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/freebsd-13-stable/sys/contrib/dev/acpica/components/utilities/
H A Dutstrsuppt.c164 UINT32 Base,
170 UINT32 Base,
511 * Base - Radix, either 8/10/16
534 UINT32 Base,
543 Status = AcpiUtStrtoulMultiply64 (*AccumulatedValue, Base, &Product);
563 * Base - Base/Radix
577 UINT32 Base,
587 if (!Multiplicand || !Base)
600 AcpiUtShortDivide (ACPI_UINT64_MAX, Base,
532 AcpiUtInsertDigit( UINT64 *AccumulatedValue, UINT32 Base, int AsciiDigit) argument
575 AcpiUtStrtoulMultiply64( UINT64 Multiplicand, UINT32 Base, UINT64 *OutProduct) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DLoopUnrollAnalyzer.h40 typedef InstVisitor<UnrolledInstAnalyzer, bool> Base; typedef in class:llvm::UnrolledInstAnalyzer
43 Value *Base = nullptr; member in struct:llvm::UnrolledInstAnalyzer::SimplifiedAddress
56 using Base::visit;
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/AST/
H A DAttrVisitor.h25 class Base { class in namespace:clang::attrvisitor
61 class AttrVisitor : public attrvisitor::Base<std::add_pointer, ImplClass, RetTy,
70 : public attrvisitor::Base<llvm::make_const_ptr, ImplClass, RetTy,
H A DDeclVisitor.h31 class Base { class in namespace:clang::declvisitor
67 : public declvisitor::Base<std::add_pointer, ImplClass, RetTy> {};
74 : public declvisitor::Base<llvm::make_const_ptr, ImplClass, RetTy> {};
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DLoopUnrollAnalyzer.cpp50 auto *Base = dyn_cast<SCEVUnknown>(SE.getPointerBase(S)); local
51 if (!Base)
54 dyn_cast<SCEVConstant>(SE.getMinusSCEV(ValueAtIteration, Base));
58 Address.Base = Base->getValue();
91 return Base::visitBinaryOperator(I);
103 auto *GV = dyn_cast<GlobalVariable>(AddressIt->second.Base);
163 return Base::visitCastInst(I);
185 if (LHSAddr.Base == RHSAddr.Base) {
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/freebsd-13-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/WebKit/
H A DPtrTypesSemantics.cpp46 const CXXRecordDecl *isRefCountable(const CXXBaseSpecifier *Base) { argument
47 assert(Base);
49 const Type *T = Base->getType().getTypePtrOrNull();
72 const auto isRefCountableBase = [](const CXXBaseSpecifier *Base,
74 return clang::isRefCountable(Base);
/freebsd-13-stable/contrib/llvm-project/clang/utils/TableGen/
H A DClangASTNodesEmitter.cpp70 std::pair<ASTNode, ASTNode> EmitNode(raw_ostream& OS, ASTNode Base);
88 ASTNode Base) {
89 std::string BaseName = macroName(std::string(Base.getName()));
91 ChildIterator i = Tree.lower_bound(Base), e = Tree.upper_bound(Base);
95 if (!Base.isAbstract())
96 First = Last = Base;
104 OS << "# define " << NodeName << "(Type, Base) "
105 << BaseName << "(Type, Base)\n";
109 OS << NodeName << "(" << Child.getName() << ", " << baseName(Base) << ")";
87 EmitNode(raw_ostream &OS, ASTNode Base) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp77 bool selectAddrRi(SDValue Addr, SDValue &Base, SDValue &Offset,
81 bool selectAddrSpls(SDValue Addr, SDValue &Base, SDValue &Offset,
90 bool selectAddrRiSpls(SDValue Addr, SDValue &Base, SDValue &Offset,
121 bool LanaiDAGToDAGISel::selectAddrRiSpls(SDValue Addr, SDValue &Base, argument
132 Base = CurDAG->getRegister(Lanai::R0, CN->getValueType(0));
145 Base = CurDAG->getRegister(Lanai::R0, CN->getValueType(0));
154 Base = CurDAG->getTargetFrameIndex(
178 Base = CurDAG->getTargetFrameIndex(
182 Base = Addr.getOperand(0);
195 Base
201 selectAddrRi(SDValue Addr, SDValue &Base, SDValue &Offset, SDValue &AluOp) argument
206 selectAddrSpls(SDValue Addr, SDValue &Base, SDValue &Offset, SDValue &AluOp) argument
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