Searched refs:mayLoad (Results 51 - 72 of 72) sorted by relevance
123
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 632 (!MI.mayLoad() || !MI.isDereferenceableInvariantLoad(AA)));
668 else if (MI.mayLoad()) {
1178 if (PI.getKind() == SDep::Order && PI.getSUnit()->getInstr()->mayLoad()) {
2230 if (!DI->mayStore() || !SI->mayLoad())
|
| H A D | MachineSink.cpp | 769 if (!(MI.mayLoad() && !MI.isPredicable()))
|
| H A D | StackColoring.cpp | 1112 if (!I.mayLoad() && !I.mayStore())
|
| H A D | EarlyIfConversion.cpp | 232 if (I->mayLoad()) {
|
| H A D | PeepholeOptimizer.cpp | 1313 if (!MI.canFoldAsLoad() || !MI.mayLoad())
|
| H A D | TwoAddressInstructionPass.cpp | 1348 if (MI.mayLoad() && !regBKilled) {
|
| H A D | MachineVerifier.cpp | 1492 if ((*I)->isLoad() && !MI->mayLoad())
1493 report("Missing mayLoad flag", MI);
1831 bool loads = MI->mayLoad();
|
| H A D | TargetLoweringBase.cpp | 1053 assert(MIB->mayLoad() && "Folded a stackmap use to a non-load!");
|
| H A D | MachineScheduler.cpp | 1606 if ((IsLoad && !SU.getInstr()->mayLoad()) ||
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 316 if (MCID.mayLoad())
|
| H A D | SelectionDAGISel.cpp | 3536 bool mayLoad = MCID.mayLoad();
3544 if (mayLoad)
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUSubtarget.cpp | 770 if (!MI2.mayLoad() && !MI2.mayStore()) {
|
| H A D | SIInstrInfo.cpp | 156 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad())
302 if (LdSt.mayLoad())
1553 if (!MI.mayLoad() || MI.hasUnmodeledSideEffects())
5951 if (!MI.mayLoad())
|
| /freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenInstruction.cpp | 402 mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset);
|
| H A D | GlobalISelEmitter.cpp | 2891 if (I->mayLoad || I->mayStore) {
2896 // TODO: Limit this to matched instructions that mayLoad/mayStore or have
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 178 if (MI.mayLoad() && !MI.isDereferenceableInvariantLoad(&AA))
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 1498 if (MI.mayLoad() && hasLoadFromStackSlot(MI, Accesses) &&
3638 if (Subtarget.isSwift() && (Desc.mayLoad() || Desc.mayStore()))
4357 return DefMCID.mayLoad() ? 3 : 1;
4650 return MI.mayLoad() ? 3 : 1;
|
| H A D | ARMLoadStoreOptimizer.cpp | 2123 if (I->mayStore() || (!isLd && I->mayLoad()))
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 630 bool Load = MI->mayLoad();
|
| H A D | HexagonFrameLowering.cpp | 2304 assert(EI.mayLoad() && "Unexpected end instruction");
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2139 if (MCID.mayLoad() || MCID.mayStore()) {
2146 expandMem9Inst(Inst, IDLoc, Out, STI, MCID.mayLoad());
2149 expandMem16Inst(Inst, IDLoc, Out, STI, MCID.mayLoad());
2157 if (MCID.mayLoad() && Opcode != Mips::LWP_MM) {
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3021 if (!Desc.mayLoad() || !Desc.mayStore())
|
Completed in 321 milliseconds
123