Searched refs:Mask (Results 251 - 275 of 334) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp896 unsigned Mask = MaskMO.getImm(); local
906 unsigned LowBit = Mask & -Mask;
908 Mask ^= BitsAboveLowBit;
911 return Mask;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp1608 SDValue N2, ArrayRef<int> Mask) {
1609 assert(VT.getVectorNumElements() == Mask.size() &&
1618 // Validate that all indices in Mask are within the range of the elements
1620 int NElts = Mask.size();
1621 assert(llvm::all_of(Mask,
1626 SmallVector<int, 8> MaskVec(Mask.begin(), Mask.end());
2251 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
2252 /// this predicate to simplify operations downstream. Mask is known to be zero
2254 bool SelectionDAG::MaskedValueIsZero(SDValue V, const APInt &Mask,
[all...]
H A DSelectionDAGBuilder.cpp2666 if (!isUIntN(VT.getSizeInBits(), B.Cases[i].Mask)) {
2721 unsigned PopCount = countPopulation(B.Mask);
2728 ShiftOp, DAG.getConstant(countTrailingZeros(B.Mask), dl, VT),
2734 ShiftOp, DAG.getConstant(countTrailingOnes(B.Mask), dl, VT),
2743 VT, SwitchVal, DAG.getConstant(B.Mask, dl, VT));
3602 SmallVector<int, 8> Mask; local
3603 ShuffleVectorInst::getShuffleMask(MaskV, Mask);
3604 unsigned MaskNumElts = Mask.size();
3607 setValue(&I, DAG.getVectorShuffle(VT, DL, Src1, Src2, Mask));
3613 // Mask i
4333 SDValue Mask = getValue(MaskOperand); local
4454 SDValue Mask = getValue(I.getArgOperand(3)); local
4522 SDValue Mask = getValue(MaskOperand); local
4568 SDValue Mask = getValue(I.getArgOperand(2)); local
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H A DLegalizeDAG.cpp134 ArrayRef<int> Mask) const;
261 ArrayRef<int> Mask) const {
269 return DAG.getVectorShuffle(NVT, dl, N1, N2, Mask);
273 int Idx = Mask[i];
3035 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Node)->getMask();
3070 if (Mask[i] < 0) {
3072 NewMask.push_back(Mask[i]);
3076 NewMask.push_back(Mask[i]*factor+fi);
3079 Mask = NewMask;
3087 if (Mask[
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H A DLegalizeFloatTypes.cpp237 // Mask = ~(1 << (Size-1))
240 SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT); local
242 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
327 SDValue Mask = DAG.getNode( local
331 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
332 LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
/freebsd-12-stable/contrib/llvm-project/clang/lib/Frontend/
H A DCompilerInvocation.cpp611 auto Mask = parseXRayInstrValue(B); local
612 if (Mask == XRayInstrKind::None)
616 S.Mask = Mask;
617 else if (Mask == XRayInstrKind::All)
618 S.Mask = Mask;
620 S.set(Mask, true);
1098 Opts.XRayInstrumentationBundle.Mask = XRayInstrKind::All;
3737 code = hash_combine(code, SanHash.Mask);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DValueTracking.cpp287 static bool MaskedValueIsZero(const Value *V, const APInt &Mask, unsigned Depth,
290 bool llvm::MaskedValueIsZero(const Value *V, const APInt &Mask, argument
295 V, Mask, Depth, Query(DL, AC, safeCxtI(V, CxtI), DT, UseInstrInfo));
460 APInt Mask = APInt::getHighBitsSet(BitWidth, CommonPrefixBits); local
461 Known.One &= Range.getUnsignedMax() & Mask;
462 Known.Zero &= ~Range.getUnsignedMax() & Mask;
2279 APInt Mask = APInt::getSignedMaxValue(BitWidth); local
2282 if (XKnown.One.intersects(Mask))
2286 if (YKnown.One.intersects(Mask))
2384 /// Return true if 'V & Mask' i
2393 MaskedValueIsZero(const Value *V, const APInt &Mask, unsigned Depth, const Query &Q) argument
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H A DConstantFolding.cpp1324 Constant *Mask = local
1327 Input = ConstantExpr::getAnd(Input, Mask);
2404 auto *Mask = Operands[2]; local
2411 auto *MaskElt = Mask->getAggregateElement(I);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2842 // Mask off the unnecessary bits of the AND immediate; normally
3078 // 1. Mask includes the LSB -> Simply shift the top N bits off
3082 // 2. Mask includes the MSB -> Simply shift the bottom N bits off
4607 int Mask = 0; local
4612 Mask = getMClassFlagsMask(Flags);
4613 if (Mask == -1)
4615 return Mask << 2;
4624 return Mask | 0x9;
4648 if (!FlagVal || (Mask & FlagVal))
4650 Mask |
4866 int Mask = getARClassRegisterMask(Reg, Flags); local
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp740 const uint32_t *Mask = local
742 assert(Mask && "Missing call preserved mask for calling convention");
743 Ops.push_back(DAG.getRegisterMask(Mask));
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp152 unsigned Mask = CD8_Scale - 1;
153 assert((CD8_Scale & Mask) == 0 && "Invalid memory object size.");
154 if (Value & Mask) // Unaligned offset
/freebsd-12-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/
H A DRuntimeDyldELF.cpp44 uint64_t Mask = (0x3 << 29) | (0x1FFFFC << 3); local
45 write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi);
51 uint64_t Mask = ((uint64_t)1 << (End + 1 - Start)) - 1; local
52 return (Val >> Start) & Mask;
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineFunction.h799 ArrayRef<int> allocateShuffleMask(ArrayRef<int> Mask);
H A DTargetLowering.h561 /// Mask: x & (-1 << y) (the instcombine canonical form)
881 virtual bool isShuffleMaskLegal(ArrayRef<int> /*Mask*/, EVT /*VT*/) const {
894 virtual bool isVectorClearMaskLegal(ArrayRef<int> /*Mask*/,
1733 Value *Mask, Value *ShiftAmt,
1743 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const {
3185 /// Determine which of the bits specified in Mask are known to be either zero
3194 /// Determine which of the bits specified in Mask are known to be either zero
3251 /// or equivalent variations. The Mask argument maybe be modified as the
3255 SDValue N1, MutableArrayRef<int> Mask,
4167 /// in the \p Mask
1730 emitMaskedAtomicRMWIntrinsic(IRBuilder< &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, Value *Mask, Value *ShiftAmt, AtomicOrdering Ord) const argument
1741 emitMaskedAtomicCmpXchgIntrinsic( IRBuilder< &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const argument
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp446 SA.Mask = Arg.getMask();
/freebsd-12-stable/contrib/llvm-project/clang/include/clang/AST/
H A DASTContext.h2947 LLVM_NODISCARD ObjCEncOptions keepingOnly(ObjCEncOptions Mask) const {
2948 return Bits & Mask.Bits;
2952 ObjCEncOptions Mask = ObjCEncOptions() local
2955 return Bits & ~Mask.Bits;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp69 // corresponds to the field in the IT instruction encoding; Mask
71 void setITState(char Firstcond, char Mask) { argument
73 unsigned NumTZ = countTrailingZeros<uint8_t>(Mask);
78 unsigned Else = (Mask >> Pos) & 1;
110 void setVPTState(char Mask) { argument
112 unsigned NumTZ = countTrailingZeros<uint8_t>(Mask);
116 bool T = ((Mask >> Pos) & 1) == 0;
958 unsigned Mask = MI.getOperand(1).getImm(); local
959 ITBlock.setITState(Firstcond, Mask);
962 if (Firstcond == ARMCC::AL && !isPowerOf2_32(Mask))
991 unsigned Mask = MI.getOperand(0).getImm(); local
4704 unsigned Mask = fieldFromInstruction(Val, 10, 2); local
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/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenRegisters.cpp1488 // Create Mask+Rotate operation and merge with existing ops if possible.
1495 I.Mask |= SrcMask;
1510 LaneTransforms[0].Mask = LaneBitmask::getAll();
1514 // Mask 0xffffffff with Rotation 0.
1526 LaneBitmask Mask = Idx.computeLaneMask(); local
1530 CoveringLanes &= ~Mask;
H A DAsmWriterEmitter.cpp400 uint64_t Mask = (1ULL << TableSize) - 1; local
404 O << " " << ((OpcodeInfo[i] >> Shift) & Mask) << "U,\t// "
/freebsd-12-stable/sys/dev/pms/freebsd/driver/ini/src/
H A Dosapi.c641 bit32 Mask
/freebsd-12-stable/sys/contrib/dev/acpica/include/
H A Dacdisasm.h1044 UINT16 Mask);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp237 // Mask length is a multiple of the source vector length.
242 ArrayRef<int> Mask = MI.getOperand(3).getShuffleMask(); local
244 int Idx = Mask[i];
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DDeadStoreElimination.cpp1268 APInt Mask = local
1274 (EarlierValue & ~Mask) | (LaterValue << LShiftAmount);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp549 APInt Mask = ~*RHSC; local
550 if (Mask.isPowerOf2() && (C->getValue() & ~Mask) == C->getValue()) {
558 C->getValue() | Mask));
572 APInt Mask = *RHSC; local
573 if (Mask.isPowerOf2() && (C->getValue() | Mask) == C->getValue()) {
580 C->getValue() & ~Mask));
5181 // Mask off.
/freebsd-12-stable/sys/contrib/edk2/Include/IndustryStandard/
H A DAcpi60.h1909 UINT64 Mask; member in struct:__anon10516
1988 UINT64 Mask; member in struct:__anon10518

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